MC14585BD

© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 6
1 Publication Order Number:
MC14585B/D
MC14585B
4−Bit Magnitude Comparator
The MC14585B 4−Bit Magnitude Comparator is constructed with
complementary MOS (CMOS) enhancement mode devices. The circuit
has eight comparing inputs (A3, B3, A2, B2, A1, B1, A0, B0), three
cascading inputs (A < B, A = B, and A > B), and three outputs (A < B,
A = B, and A > B). This device compares two 4−bit words (A and B)
and determines whether they are “less than”, “equal to”, or “greater
than” by a high level on the appropriate output. For words greater than
4−bits, units can be cascaded by connecting outputs (A > B), (A < B),
and (A = B) to the corresponding inputs of the next significant
comparator. Inputs (A < B), (A = B), and (A > B) on the least significant
(first) comparator are connected to a low, a high, and a low, respectively.
Applications include logic in CPU’s, correction and/or detection of
instrumentation conditions, comparator in testers, converters, and
controls.
Features
Diode Protection on All Inputs
Expandable
Applicable to Binary or 8421−BCD Code
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load over the Rated Temperature Range
Can be Cascaded − See Figure 3
Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to V
SS
)
Parameter
Symbol Value Unit
DC Supply Voltage Range V
DD
0.5 to +18.0 V
Input or Output Voltage Range
(DC or Transient)
V
in
, V
out
0.5 to V
DD
+ 0.5
V
Input or Output Current (DC or Transient)
per Pin
I
in
, I
out
±10 mA
Power Dissipation per Package (Note 1) P
D
500 mW
Ambient Temperature Range T
A
55 to +125 °C
Storage Temperature Range T
stg
65 to +150 °C
Lead Temperature (8−Second Soldering) T
L
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
v (V
in
or V
out
) v V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
SS
or V
DD
). Unused outputs must be left open.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Device Package Shipping
ORDERING INFORMATION
MC14585BCP PDIP−16 25 Units / Rail
MC14585BD SOIC−16 48 Units / Rail
MC14585BDR2 SOIC−16 2500/Tape & Ree
l
MC14585BFEL SOEIAJ−16
http://onsemi.com
2000/Tape & Ree
l
MC14585BFELG SOEIAJ−16
(Pb−Free)
2000/Tape & Ree
l
MC14585BDR2G SOIC−16
(Pb−Free)
2500/Tape & Ree
l
MC14585BDG SOIC−16
(Pb−Free)
48 Units / Rail
MC14585BCPG PDIP−16
(Pb−Free)
25 Units / Rail
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
s
Brochure, BRD8011/D.
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G = Pb−Free Package
MARKING
DIAGRAMS
PDIP−16
P SUFFIX
CASE 648
SOIC−16
D SUFFIX
CASE 751B
1
16
14585BG
AWLYWW
SOEIAJ−16
F SUFFIX
CASE 966
1
16
MC14585B
ALYWG
16
1
MC14585BCP
AWLYYWWG
1
1
1
MC14585B
http://onsemi.com
2
PIN ASSIGNMENT
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
(A t B)
out
(A u B)
out
B3
A3
V
DD
B1
A0
B0
(A u B)
in
(A = B)
out
A2
B2
V
SS
A1
(A = B)
in
(A t B)
in
BLOCK DIAGRAM
14
15
1
2
9
7
11
10
5
6
4
13
3
12
V
DD
= PIN 16
V
SS
= PIN 8
(A>B)
in
(A=B)
in
(A<B)
in
A0
B0
A1
B1
A2
B2
A3
B3
(A>B)
out
(A=B)
out
(A<B)
out
TRUTH TABLE (x = Don’t Care)
Inputs
Outputs
Comparing Cascading
A3, B3 A2, B2 A1, B1 A0, B0 A < B A = B A > B A < B A = B A > B
A3 > B3 x x x x x x 0 0 1
A3 = B3 A2 > B2 x x x x x 0 0 1
A3 = B3 A2 = B2 A1 > B1 x x x x 0 0 1
A3 = B3 A2 = B2 A1 = B1 A0 > B0 x x x 0 0 1
A3 = B3 A2 = B2 A1 = B1 A0 = B0 0 0 x 0 0 1
A3 = B3 A2 = B2 A1 = B1 A0 = B0 0 1 x 0 1 0
A3 = B3 A2 = B2 A1 = B1 A0 = B0 1 0 x 1 0 0
A3 = B3 A2 = B2 A1 = B1 A0 = B0 1 1 x 1 1 0
A3 = B3 A2 = B2 A1 = B1 A0 < B0 x x x 1 0 0
A3 = B3 A2 = B2 A1 < B1 x x x x 1 0 0
A3 = B3 A2 < B2 x x x x x 1 0 0
A3 < B3 x x x x x x 1 0 0
MC14585B
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3
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
SS
)
Characteristic Symbo
l
V
DD
Vdc
– 55_C 25_C 125_C
Unit
Min Max Min
Typ
(Note 2)
Max Min Max
Output Voltage “0” Level
V
in
= V
DD
or 0
V
OL
5.0
10
15
0.05
0.05
0.05
0
0
0
0.05
0.05
0.05
0.05
0.05
0.05
Vdc
“1” Level
V
in
= 0 or V
DD
V
OH
5.0
10
15
4.95
9.95
14.95
4.95
9.95
14.95
5.0
10
15
4.95
9.95
14.95
Vdc
Input Voltage “0” Level
(V
O
= 4.5 or 0.5 Vdc)
(V
O
= 9.0 or 1.0 Vdc)
(V
O
= 13.5 or 1.5 Vdc)
V
IL
5.0
10
15
1.5
3.0
4.0
2.25
4.50
6.75
1.5
3.0
4.0
1.5
3.0
4.0
Vdc
“1” Level
(V
O
= 0.5 or 4.5 Vdc)
(V
O
= 1.0 or 9.0 Vdc)
(V
O
= 1.5 or 13.5 Vdc)
V
IH
5.0
10
15
3.5
7.0
11
3.5
7.0
11
2.75
5.50
8.25
3.5
7.0
11
Vdc
Output Drive Current
(V
OH
= 2.5 Vdc) Source
(V
OH
= 4.6 Vdc)
(V
OH
= 9.5 Vdc)
(V
OH
= 13.5 Vdc)
I
OH
5.0
5.0
10
15
– 3.0
– 0.64
– 1.6
– 4.2
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
– 1.7
– 0.36
– 0.9
– 2.4
mAdc
(V
OL
= 0.4 Vdc) Sink
(V
OL
= 0.5 Vdc)
(V
OL
= 1.5 Vdc)
I
OL
5.0
10
15
0.64
1.6
4.2
0.51
1.3
3.4
0.88
2.25
8.8
0.36
0.9
2.4
mAdc
Input Current I
in
15 ± 0.1 ± 0.00001 ± 0.1 ± 1.0
mAdc
Input Capacitance (V
in
= 0) C
in
5.0 7.5 pF
Quiescent Current (Per Package) I
DD
5.0
10
15
5.0
10
20
0.005
0.010
0.015
5.0
10
20
150
300
600
mAdc
Total Supply Current (Notes 3, 4)
(Dynamic plus Quiescent,
Per Package)
(C
L
= 50 pF on all outputs, all
buffers switching)
I
T
5.0
10
15
I
T
= (0.6 mA/kHz) f + I
DD
I
T
= (1.2 mA/kHz) f + I
DD
I
T
= (1.8 mA/kHz) f + I
DD
mAdc
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
3. The formulas given are for the typical characteristics only at 25_C.
4. To calculate total supply current at loads other than 50 pF: I
T
(C
L
) = I
T
(50 pF) + (C
L
– 50) Vfk where: I
T
is in mA (per package), C
L
in pF,
V = (V
DD
– V
SS
) in volts, f in kHz is input frequency, and k = 0.001.
SWITCHING CHARACTERISTICS (Note 5) (C
L
= 50 pF, T
A
= 25_C)
Characteristic
Symbol V
DD
Min
Typ
(Note 6)
Max Unit
Output Rise and Fall Time
t
TLH
, t
THL
= (1.5 ns/pF) C
L
+ 25 ns
t
TLH
, t
THL
= (0.75 ns/pF) C
L
+ 12.5 ns
t
TLH
, t
THL
= (0.55 ns/pF) C
L
+ 9.5 ns
t
TLH
,
t
THL
5.0
10
15
100
50
40
200
100
80
ns
Turn−On, Turn−Off Delay Time
t
PLH
, t
PHL
= (1.7 ns/pF) C
L
+ 345 ns
t
PLH
, t
PHL
= (0.66 ns/pF) C
L
+ 147 ns
t
PLH
, t
PHL
= (0.5 ns/pF) C
L
+ 105 ns
t
PLH
,
t
PHL
5.0
10
15
430
180
130
860
360
260
ns
5. The formulas given are for the typical characteristics only at 25_C.
6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

MC14585BD

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Logic Comparators 4-Bit CMOS Magnitude
Lifecycle:
New from this manufacturer.
Delivery:
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