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IRPLMB1E
fmin (VCO > 4.6V), the non-ZVS and crest-factor pro-
tection will be activated and the frequency will in-
crease again to try and maintain ZVS. The frequency
will sweep back through resonance (from the ca-
pacitive side) and the crest-factor protection will shut-
down the IC on the first event when the inductor satu-
rates to a level where the crest factor exceeds 3 (see
Fig. 7.1).
Fig. 7.2 shows pin LO, pin VS and the current in the
resonant inductor during shutdown, with a shorter
time scale. The final shortened pulse of LO just be-
fore shutdown (Fig. 7.2) occurs due to the internal
1us blank time of the crest-factor detection during
each turn-on rising edge of LO (to provide immunity
to noise and transients).
Fig. 7.1:
4 is the current in the resonant inductor, 2 is the lamp
voltage, 3 is the voltage in pin VCO
Fig. 7.2:
4 is the current in the resonant inductor, 2 is pin VS (HB
Voltage), 3 is pin LO
7.2. Open Filaments Protection
The open filament protection relies on the non-ZVS
circuit of the IR2520D, enabled when pin VCO
reaches 4.6V. Should an open filament lamp fault
occur, hard-switching will occur at the half-bridge and
the non-ZVS circuit inside the IR2520 will detect this
condition, increase the frequency each cycle and shut
down when VCO decreases below 1V; both gate
driver outputs will be latched ‘low’. This will prevent
hard-switching and damaging of the half-bridge
MOSFETs.
Fig. 7.3 shows the pin VCO and pin VS at the shut-
down with open filament. As you can see, at startup
pin VCO charges from 0V up to 4.6V, at 4.6V the
non-ZVS circuit is enabled, CVCO discharges and
the frequency increases. When the voltage on pin
VCO decreases below 1V we have latched shutdown.
8 www.irf.com
IRPLMB1E
Fig. 7.4 shows pin VCO and pin VS (HB Voltage) at
the shutdown with a shorter time scale. The FMIN
pin can be used as trigger as this pin transitions
from 5V to COM when the IC enters fault mode or
UVLO-.
Fig. 7.3:
3 is the voltage in pin VCO and 2 is pin VS
Fig. 7.4:
1 is the voltage in pin FMIN, 3 is the voltage in pin
VCO, 2 is pin VS
7.3. Low AC line Protection
As you can see from figure 7.5, varying the AC line
from 220V to 130VAC the ZVMCS circuit of the IR2520
increases automatically the frequency to maintain
ZVS.
When the mains voltage decreases, the resonant
frequency increases, becoming close to the run
frequency. This will cause non-ZVS. The IR2520
will detect non-ZVS and increase the frequency
continuously as long as non-ZVS is detected. This
will protect the half-bridge MOSFETs against
hard-switching.
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IRPLMB1E
Figure 7.5:
VS PIN for AC line 220V (on the top) and AC line
130V (on the bottom)
8. MINIBALLAST Layout
The Layout of the Reference Kit MINIBALLAST1 is
shown in Fig. 8.1.
The critical components are CVCC, CVCO, RFMIN
and CBOOT. They must be placed as close as
possible to the pins of the IR2520D. The ground of
CCVO, RFMIN and CVCC need to be connected to
pin COM of the IR2520D and this ground path
must be connected to the power ground at a single
point

IRPLMB1E

Mfr. #:
Manufacturer:
Infineon / IR
Description:
Power Management IC Development Tools Design Kit for Mini-ballast for single 25W compact fluorescent ballast, European version with 230VACin
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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