Applications information STA533WF
10/15 Doc ID 17658 Rev 2
Figure 6. Applications circuit for stereo full-bridge configuration
Figure 7. Applications circuit for single-BTL configuration
C38
1nF
C39
1nF
L5 22uH
L6 22uH
C40
1nF
C41
1nF
C42 100nF
C43 100nF
C44
470nF
C45
330pF
C46
100nF
R11
22
1
2
J3
LEFT 8OHM
C47
100nF
R12
6.2
R13
6.2
L3 22uH
L4 22uH
C35
1nF
C37
1nF
C28
100nF
C20 100nF
C24
470nF
C26
330pF
C27
100nF
R6
22
1
2
J2
RIGHT 8OHM
C21
100nF
R7
6.2
R9
6.2
+
C36
1000uF/25V
TH W
3V3
R10 10k
RIGHT_B
Vcc
RIGHT_A
R8
10K
C31
100nF
C22
100nF
GNDSUB
1
OUT2B
2
OUT2B
3
VCC2B
4
GND2B
5
GND2A
6
VCC2A
7
OUT2A
8
OUT2A
9
OUT1B
10
OUT1B
11
VCC1B
12
GND1B
13
GND1A
14
VCC1A
15
OUT1A
16
OUT1A
17
NC
18
GNDCLEAN
19
GNDREG
20
VDD
21
22
VL
23
CONFIG
24
PWRDN
25
TRISTATE
26
FAULT
27
THWARN
28
IN1A
29
IN1B
30
IN2A
31
IN2B
32
VSS
33
VSS
34
VCCSIG
35
VCCSIG
36
U2
STA533WF
LEFT_B
3V3
C30
100nF
C29
100nF
C25 1uF 25V
C23 100nF
C33
1uF 25V
C32 100nF
EAPD
LEFT_A
VDD
C10
220nF
R4
3R3
R2
3R3
C7
220nF
C9
1nF
+
C19
1000uF/25V
C18
100nF
TH W
1
2
J1
OUT 4OHM
R3
10
C8
1uF
C4 220nF
R5 10k
C3
680pF
C11 220nF
Vcc
R1
10K
C14
100nF
C2
100nF
GNDSUB
1
OUT2B
2
OUT2B
3
VCC2B
4
GND2B
5
GND2A
6
VCC2A
7
OUT2A
8
OUT2A
9
OUT1B
10
OUT1B
11
VCC1B
12
GND1B
13
GND1A
14
VCC1A
15
OUT1A
16
OUT1A
17
NC
18
GNDCLEAN
19
GNDREG
20
VDD
21
VDD
22
VL
23
CONFIG
24
PWRDN
25
TRISTATE
26
FAULT
27
THWARN
28
IN1A
29
IN1B
30
IN2A
31
IN2B
32
VSS
33
34
VCCSIG
35
VCCSIG
36
U1
STA533WF
3V3
C13
100nF
C12
100nF
C6 1uF 25V
C1 100nF
L1 10uH
C17
1uF 25V
L2 10uH
C15 100nF
EAPD
C5
1nF
C16
1nF
INPUT_A
INPUT_B
VSS
3V3
STA533WF Heatsink requirements
Doc ID 17658 Rev 2 11/15
4 Heatsink requirements
Using the STA533WF mounted on a double-layer PCB having 2 copper ground areas of
3x3cm
2
and with 16 via holes the junction to ambient thermal resistance is approximately
24 °C/W in natural air convection.
Figure 8. Double-layer PCB with copper ground areas and 16 via holes
With the dissipated power within the device depending primarily on the supply voltage, the
load impedance and the output modulation level, the maximum estimated dissipated power,
Pdmax, for the STA533WF is:
4 W for 2 x 20 W into 8 Ω at 18 V
< 5 W for 2 x 10 W into 8 Ω + 1 x 20 W into 4 Ω at 18 V.
The figure below shows the power derating curve for the PowerSSO36 EPD package on
PCBs with copper areas of 2 x 2 cm
2
and 3 x 3 cm
2
.
Figure 9. Power derating curves for PCB used as heatsink
0
1
2
3
4
5
6
7
8
0 20 40 60 80 100 120 140 160
Pd (W)
Tamb ( °C)
Copper Area 2x2 cm
and via holes
TDA7491P
PSSO36
Copper Area 3x3 cm
and via holes
STA533WF
PowerSSO36
Package mechanical data STA533WF
12/15 Doc ID 17658 Rev 2
5 Package mechanical data
The STA533WF comes in a 36-pin PowerSSO package with exposed pad down (EPD).
Figure 10 below shows the package outline and Tabl e 8 gives the dimensions.
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Table 8. PowerSSO36 EPD dimensions
Symbol
Dimensions in mm Dimensions in inches
Min Typ Max Min Typ Max
A 2.15 - 2.47 0.085 - 0.097
A2 2.15 - 2.40 0.085 - 0.094
a1 0.00 - 0.10 0.000 - 0.004
b 0.18 - 0.36 0.007 - 0.014
c 0.23 - 0.32 0.009 - 0.013
D 10.10 - 10.50 0.398 - 0.413
E 7.40 - 7.60 0.291 - 0.299
e - 0.5 - - 0.020 -
e3 - 8.5 - - 0.335 -
F - 2.3 - - 0.091 -
G- - 0.10 - - 0.004
H 10.10 - 10.50 0.398 - 0.413
h- - 0.40 - - 0.016
k 0 - 8 degrees 0 - 8 degrees
L 0.60 - 1.00 0.024 - 0.039
M - 4.30 - - 0.169 -
N - - 10 degrees - - 10 degrees
O - 1.20 - - 0.047 -
Q - 0.80 - - 0.031 -
S - 2.90 - - 0.114 -
T - 3.65 - - 0.144 -
U - 1.00 - - 0.039 -
X 4.10 - 4.70 0.161 - 0.185
Y 6.50 - 7.10 0.256 - 0.280

STA533WF13TR

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Audio Amplifiers 18V 3A Quad Power Half-Bridge AMP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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