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MC74HC74ADR2G

P1-P3P4-P6P7-P7
MC74HC74A
http://onsemi.com
4
TIMING REQUIREMENTS (Input t
r
= t
f
= 6.0 ns)
Symbo
l
Parameter
V
CC
V
Guaranteed Limit
Unit
–55 to
25_C
v 85_C v 125_C
t
su
Minimum Setup Time, Data to Clock
(Figure 3)
2.0
3.0
4.5
6.0
80
35
16
14
100
45
20
17
120
55
24
20
ns
t
h
Minimum Hold Time, Clock to Data
(Figure 3)
2.0
3.0
4.5
6.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
ns
t
rec
Minimum Recovery Time, Set or Reset Inactive to Clock
(Figure 2)
2.0
3.0
4.5
6.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
ns
t
w
Minimum Pulse Width, Clock
(Figure 1)
2.0
3.0
4.5
6.0
60
25
12
10
75
30
15
13
90
40
18
15
ns
t
w
Minimum Pulse Width, Set or Reset
(Figure 2)
2.0
3.0
4.5
6.0
60
25
12
10
75
30
15
13
90
40
18
15
ns
t
r
, t
f
Maximum Input Rise and Fall Times
(Figures 1, 2, 3)
2.0
3.0
4.5
6.0
1000
800
500
400
1000
800
500
400
1000
800
500
400
ns
ORDERING INFORMATION
Device Package Shipping
†
MC74HC74ADG SOIC−14 NB
(Pb−Free)
55 Units / Rail
NLV74HC74ADG* SOIC−14 NB
(Pb−Free)
55 Units / Rail
MC74HC74ADR2G SOIC−14 NB
(Pb−Free)
2500 / Tape & Reel
NLV74HC74ADR2G* SOIC−14 NB
(Pb−Free)
2500 / Tape & Reel
MC74HC74ADTR2G TSSOP−14
(Pb−Free)
2500 / Tape & Reel
NLV74HC74ADTR2G* TSSOP−14
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
MC74HC74A
http://onsemi.com
5
SWITCHING WAVEFORMS
Figure 1.
50%
50%
50%
50%
V
CC
V
CC
GND
GND
SET OR
RESET
Q
OR Q
Q OR Q
CLOCK
t
PLH
t
PHL
50%
DATA
CLOCK
V
CC
V
CC
GND
Figure 2.
VALID
GND
t
su
t
h
t
rec
t
w
SET
DATA
RESET
4, 10
2, 12
1, 13
CLOCK
3, 11
5, 9
6, 8
Q
Q
*Includes all probe and jig capacitance
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 3.
1/f
max
CLOCK
Q or Q
t
f
t
r
V
CC
GND
90%
50%
10%
90%
50%
10%
t
PLH
t
PHL
t
TLH
t
THL
t
w
50%
Figure 4.
Figure 5. EXPANDED LOGIC DIAGRAM
MC74HC74A
http://onsemi.com
6
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G
ISSUE B
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C −−− 1.20 −−− 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.50 0.60 0.020 0.024
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
____
S
U0.15 (0.006) T
2X L/2
S
U
M
0.10 (0.004) V
S
T
L
−U−
SEATING
PLANE
0.10 (0.004)
−T−
SECTION N−N
DETAIL E
J
J1
K
K1
DETAIL E
F
M
−W−
0.25 (0.010)
8
14
7
1
PIN 1
IDENT.
H
G
A
D
C
B
S
U0.15 (0.006) T
−V−
14X REFK
N
N
7.06
14X
0.36
14X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
P1-P3P4-P6P7-P7

MC74HC74ADR2G

Mfr. #:
Buy MC74HC74ADR2G
Manufacturer:
ON Semiconductor
Description:
Flip Flops 2-6V CMOS Dual D-Type w/Set Reset
Lifecycle:
New from this manufacturer.
Delivery:
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