Si3400/Si3401
16 Rev. 0.9
5. Package Outline
Figure 5 illustrates the package details for the Si3400 and Si3401. Table 12 lists the values for the dimensions
shown in the illustration.
Figure 5. 20-Lead Quad Flat No-Lead Package (QFN)
Table 12. Package Dimensions
Dimension Min Nom Max
A 0.80 0.85 0.90
A1 0.00 0.02 0.05
b 0.25 0.30 0.35
D 5.00 BSC.
D2 2.60 2.70 2.80
e 0.80 BSC.
E 5.00 BSC.
E2 2.60 2.70 2.80
L 0.50 0.55 0.60
L1 0.00 0.10
aaa 0.10
bbb 0.10
ccc 0.08
ddd 0.10
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MO-220, Variation VHHB-1.
Si3400/Si3401
Rev. 0.9 17
6. Ordering Guide
Part Number
1,2
Package Temp Range Recommended
Maximum Output Power
3
Si3400-X-GM 20-pin QFN,
Pb-free; RoHS compliant
–40 to 85 °C < 10 W
Si3401-X-GM 20-pin QFN,
Pb-free; RoHS compliant
–40 to 85 °C 14 to 16 W
Notes:
1. “X” denotes product revision.
2. Add an “R” at the end of the part number to denote tape and reel option.
3. Refer to “AN313: Using the Si3400/01 in High Power Applications” and “AN314: Power Combining Circuit for
PoE for up to 18.5 W Output” for more information about using the Si3400 and Si3401 in higher power
applications.
Si3400/Si3401
18 Rev. 0.9
DOCUMENT CHANGE LIST
Revision 0.3 to Revision 0.4
Updated Figure 2 on page 9.
R9 now correctly connected to VNEG; RIMAX now
connects to VDD.
Added Table 6, “Package Thermal Characteristics,”
on page 7.
Updated Figure 3 on page 10.
Updated Table 4 on page 6.
Updated switcher frequency specification to 350 kHz.
Added “pad” notes to VNEG pin under Description
section in Table 11 on page 15.
Updated Table 7, “Component Listing—Class 0 with
5 V Output,” on page 8 and Table 8, “Components—
Class 1 with Isolated 5.0 V Output,” on page 9.
Updated recommended BOMs.
Revision 0.4 to Revision 0.5
Updated Table 4 on page 6.
Updated test condition for VDD current.
Updated minimum value of switcher FET on resistance.
Updated Table 8 on page 9 and Table 10 on
page 12.
Updated Rclass information.
Updated “5. Package Outline” and Table 12,
“Package Dimensions,” on page 16.
Replaced package drawing and dimensions table.
Revision 0.5 to Revision 0.6
Added Si3401.
Updated Figure 1 on page 8.
Updated Table 7 on page 8.
Updated "6. Ordering Guide" on page 17.
Revision 0.6 to Revision 0.7
Added VSSA pin throughout document for product
revisions beginning with Rev D.
Updated Table 2 specs (for ESD).
Updated Table 4 specs (for current limits).
Updated Table 5 specs (for power dissipation).
Updated Figure 1 and Table 7.
Updated Figure 2 and Table 8.
Updated Figure 4 and Table 11.
Revision 0.7 to Revision 0.8
ISOSSFT (pin 4) added throughout document.
Updated Figures 1 and 2 for addition of ISOSSFT
pin. Function available on Revision E and higher.
Revision 0.8 to Revision 0.9
Updated throughout document to support Revision
E.
Added Regulated Output Voltage Tolerance
specification to Table 4, for non-isolated applications
only.
Updated Figure 1, Figure 2, and Table 7 for Rev. E
BOM changes.
Nominal class resistor values updated for Rev. E in
Table 10.

SI3400-C-GM

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Hot Swap Voltage Controllers
Lifecycle:
New from this manufacturer.
Delivery:
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