Si3400/Si3401
4 Rev. 0.9
1. Electrical Specifications
Table 1. Absolute Maximum Ratings (DC)
1
Type Description Rating Unit
Voltage CT1 to CT2 –60 to 60
V
SP1 to SP2 –60 to 60
VPOS
2
–0.3 to 60
HSO –0.3 to 60
VSS1 or VSS2 –0.3 to 60
SWO –0.3 to 60
PLOSS
to VPOS
2
–60 to 0.3
RDET –0.3 to 60
RCL –0.3 to 5
SSFT to VPOS
2
–5 to 0.3
EROUT to VSS1, VSS2, or VSSA –0.3 to VDD+0.3
FB to VPOS –5 to 0.3
RIMAX to VSS1, VSS2, or VSSA –0.3 to VDD+0.3
VSS1 to VSS2 or VSSA –0.3 to 0.3
VDD to VSS1, VSS2, or VSSA –0.3 to 5
Current RCL 0 to 100
mA
RDET 0 to 1
CT1, CT2, SP1, SP2 –400 to 400
VPOS
2
–400 to 400
HSO 0 to 400
PLOSS
–0.5 to 5
VDD 0 to 2
SWO 0 to 400
VSS1, VSS2, or VSSA –400 to 0
Ambient
Temperature
Storage –65 to 150
°C
Operating –40 to 85
Notes:
1. Unless otherwise noted, all voltages referenced to VNEG. Permanent device damage may occur if the maximum ratings
are exceeded. Functional operation should be restricted to those conditions specified in the operational sections of this
data sheet. Exposure to absolute maximum rating conditions for extended periods may adversely affect device
reliability.
2. VPOS is equal to VPOSF and VPOSS tied together for test condition purposes.
Si3400/Si3401
Rev. 0.9 5
Table 2. Absolute Maximum Ratings (Transient)
1
Transient surge defined in IEC60060 as a 1000 V impulse of either polarity applied across CT1–CT2 or SP1–SP2. The shape of
the impulse shall have a 300 ns full rise time and a 50 µs half fall time, with 201 source impedance.
Type Description Rating Unit
Voltage CT1 to CT2 –82 to 82
V
SP1 to SP2 –82 to 82
VPOS
2
–0.7 to 80
HSO –0.7 to 80
VSS1, VSS2, or VSSA –0.7 to 80
SWO –0.7 to 80
PLOSS
to VPOS
2
–80 to 0.7
RDET –0.7 to 80
Current CT1, CT2, SP1, SP2 –5 to 5
A
VPOS
2
–5 to 5
ESD
3
HBM, all pins –2 to 2 kV
Notes:
1. Unless otherwise noted, all voltages referenced to VNEG. Permanent device damage may occur if the maximum ratings
are exceeded. Functional operation should be restricted to those conditions specified in the operational sections of this
data sheet. Exposure to absolute maximum rating conditions for extended periods may adversely affect device
reliability.
2. VPOS is equal to VPOSF and VPOSS tied together for test condition purposes.
3. For more information regarding system-level ESD tolerance, refer to “AN315: Robust Electrical Surge Immunity for PoE
PDs through Integrated Protection”.
Table 3. Recommended Operating Conditions
Description Symbol Min Typ Max Units
|CT1 – CT2| or |SP1 – SP2| VPORT 2.8 57 V
Ambient Operating Temperature TA –40 25 85 °C
Note: Unless otherwise noted, all voltages referenced to VNEG. All minimum and maximum specifications are guaranteed
and apply across the recommended operating conditions. Typical values apply at nominal supply voltage and ambient
temperature unless otherwise noted.
Si3400/Si3401
6 Rev. 0.9
Table 4. Electrical Characteristics
Parameter Description Min Typ Max Unit
VPORT
Detection 2.7 11
V
Classification 14 22
UVLO Turn Off 42
UVLO Turn On 30 36
Transient Surge
1
62 79
Input Offset Current
VPORT < 10 V 10 µA
Diode bridge leakage
VPORT = 57 V 25 µA
IPORT Classification
2
Class 0 0 4
mA
Class 1 9 12
Class 2 17 20
Class 3 26 30
Class 4 36 44
IPORT Operating Current
3
36 V < VPORT < 57 V 2 3.1 mA
Current Limit
4
Inrush 130 mA
Operating
350 (Si3400)
470 (Si3401)
525
550
—mA
Hotswap FET On-Resistance +
R
SENSE
36 V < VPORT < 57 V 0.5 1.4
Power loss VPORT Threshold 27 30 33 V
Switcher Frequency 350 kHz
Maximum Switcher Duty Cycle
5
ISOSSFT connected to
VDD
—50
%
Switching FET On-Resistance 0.3 0.86
Regulated Feedback @ pin FB
6
DC Avg. 1.23 V
Regulated Output Voltage Tolerance
6
Output voltage tolerance @
VOUT
–5 5
%
Notes:
1. Transient surge defined in IEC60060 as a 1000 V impulse of either polarity applied to CT1–CT2 or SP1–SP2. The
shape of the impulse shall have a 300 ns full rise time and a 50 µs half fall time with 201 source impedance.
2. The classification currents are guaranteed only when recommended RCLASS resistors are used, as specified in
Table 10.
3. IPORT includes full operating current of switching regulator controller.
4. The PD interface includes dual-level input current limit. At turn-on, before the HSO load capacitor is charged, the
current limit is set at the inrush level. After the capacitor has been charged within ~1.25 V of VNEG, the operating
current limit is engaged. This higher current limit remains active until the UVLO lower limit has been tripped or until the
hotswap switch is sufficiently current-limited to cause a foldback of the HSO voltage.
5. See “AN296: Using the Si3400/01 PoE PD Controller in Isolated and Non-Isolated Designs” for more information.
6. Applies to non-isolated applications only (VOUT on schematic in Figure 1).

SI3401-E1-GM

Mfr. #:
Manufacturer:
Silicon Labs
Description:
IC POWER OVER ETHERNET 20QFN
Lifecycle:
New from this manufacturer.
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