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74LVX574M

P1-P3P4-P6P7-P7
© 2005 Fairchild Semiconductor Corporation DS500050 www.fairchildsemi.com
June 1993
Revised April 2005
74LVX574 Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
74LVX574
Low Voltage Octal D-Type Flip-Flop with
3-STATE Outputs
General Description
The LVX574 is a high-speed octal D-type flip-flop which is
controlled by an edge-triggered clock input (CP) and a buff-
ered common Output Enable (OE
) input. When the OE
input is HIGH, the eight outputs are in a high impedance
state. The LVX574 is functionally identical to the LVX374
but with inputs and outputs on opposite sides of the pack-
age. The inputs tolerate up to 7V allowing interface of 5V
systems to 3V systems.
Features
■ Input voltage translation from 5V to 3V
■ Ideal for low power/low noise 3.3V applications
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol Connection Diagram
Pin Descriptions
Order Number Package Number Package Description
74LVX574M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVX574SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX574MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
D
0
–D
7
Data Inputs
CP Clock Pulse Input
OE
3-STATE Output Enable Input
O
0
–O
7
3-STATE Outputs
www.fairchildsemi.com 2
74LVX574
Functional Description
The LVX574 consists of eight edge-triggered flip-flops with
individual D-type inputs and 3-STATE true outputs. The
buffered clock and buffered Output Enable are common to
all flip-flops. The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold time
requirements on the LOW-to-HIGH Clock (CP) transition.
With the Output Enable (OE
) LOW, the contents of the
eight flip-flops are available at the outputs. When the OE
is
HIGH, the outputs go to the high impedance state. Opera-
tion of the OE
input does not affect the state of the flip-
flops.
Truth Table
H HIGH Voltage Level
L
LOW Voltage Level
X
Immaterial
Z
High Impedance
LOW-to-HIGH Transition
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs Outputs
D
n
CP OE
O
n
H LH
L
LL
XXH Z
3 www.fairchildsemi.com
74LVX574
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
(Note 2)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Noise Characteristics
(Note 3)
Note 3: (Input t
r
t
f
3 ns)
Supply Voltage (V
CC
) 0.5V to 7.0V
DC Input Diode Current (I
IK
)
V
I
0.5V 20 mA
DC Input Voltage (V
I
) 0.5V to 7V
DC Output Diode Current (I
OK
)
V
O
0.5V 20 mA
V
O
V
CC
0.5V 20 mA
DC Output Voltage (V
O
) 0.5V to V
CC
0.5V
DC Output Source
or Sink Current (I
O
) 25 mA
DC V
CC
or Ground Current
(I
CC
or I
GND
) 75 mA
Storage Temperature (T
STG
) 65 C to 150 C
Power Dissipation 180 mW
Supply Voltage (V
CC
) 2.0V to 3.6V
Input Voltage (V
I
) 0V to 5.5V
Output Voltage (V
O
)0V to V
CC
Operating Temperature (T
A
) 40 C to 85 C
Input Rise and Fall Time (
t/ V) 0 ns/V to 100 ns/V
Symbol Parameter
V
CC
T
A
25 CT
A
40 C to 85 C
Units Conditions
Min Typ Max Min Max
V
IH
HIGH Level 2.0 1.5 1.5
Input Voltage 3.0 2.0 2.0 V
3.6 2.4 2.4
V
IL
LOW Level 2.0 0.5 0.5
Input Voltage 3.0 0.8 0.8 V
3.6 0.8 0.8
V
OH
HIGH Level 2.0 1.9 2.0 1.9 V
IN
V
IH
or V
IL
I
OH
50 A
Output Voltage 3.0 2.9 3.0 2.9 V I
OH
50 A
3.0 2.58 2.48 I
OH
4 mA
V
OL
LOW Level 2.0 0.0 0.1 0.1 V
IN
V
IH
or V
IL
I
OL
50 A
Output Voltage 3.0 0.0 0.1 0.1 V I
OL
50 A
3.0 0.36 0.44 I
OL
4 mA
I
OZ
3-STATE Output 3.6 0.25 2.5 AV
IN
V
IH
or V
IL
Off-State Current V
OUT
V
CC
or GND
I
IN
Input Leakage Current 3.6 0.1 1.0 AV
IN
5.5V or GND
I
CC
Quiescent Supply Current 3.6 4.0 40.0 AV
IN
V
CC
or GND
Symbol Parameter
V
CC
T
A
25 C
Units
C
L
(pF)
(V) Typ Limit
V
OLP
Quiet Output Maximum Dynamic V
OL
3.3 0.5 0.8 V 50
V
OLV
Quiet Output Minimum Dynamic V
OL
3.3 0.5 0.8 V 50
V
IHD
Minimum HIGH Level Dynamic Input Voltage 3.3 2.0 V 50
V
ILD
Maximum LOW Level Dynamic Input Voltage 3.3 0.8 V 50
P1-P3P4-P6P7-P7

74LVX574M

Mfr. #:
Buy 74LVX574M
Manufacturer:
ON Semiconductor / Fairchild
Description:
Flip Flops Oct D-Type Flip-Flop
Lifecycle:
New from this manufacturer.
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