LC75886PW-H Datasheet LC75886PWH-H, LC75886PW-H | P28-P30

LC75886PW

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28

Sample Application Circuit 3

1/3 duty, 1/3 bias (for use with normal panels)

Note: *11. Add a capacitor to the power supply line so that the power supply voltage V

DD

rise time when power is

applied and the power supply voltage V

DD

fall time when power drops are both at least 1 ms, as the

LC75886PW is reset by the V

DET

.

*12. If the

RES

pin is not used for system reset, it must be connected to the power supply V

DD

.

*13. When RC oscillator operating mode is used, the external resistor R

OSC

and the external capacitor C

OSC

must be connected between the OSC pin and GND, and when external clock operating mode is selected the

current protection resistor Rg (4.7 to 47 k) must be connected between the OSC pin and the external clock

output pin (external oscillator). (See the section on the OSC pin peripheral circuit.)

*14. The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between 1 to 10 k)

appropriate for the capacitance of the external wiring so that signal waveforms are not degraded.

*15. The pins to be connected to the controller (CE, CL, DI, DO,

RES

) can handle 3.3 V or 5 V.

S53

COM4/S54

S5

P4/S4

P2/S2

P1/S1

COM3

(P2)

(P3)

(S55)

(S56)

P5

COM1

COM2

P3/S3

(P4)

(P1)

P5/S57

(S57)

(S54)

C0.047F

To the controller

From the

controller

+5V

*11

C

*14

V

DD

OSC

DO

DI

CL

*12

Key matrix

(up to 30 keys)

RES

CE

V

DD

1

V

DD

2

TEST

V

SS

S

5

6

/

K

S

2

S

5

/

K

S

1

K

S

3

K

S

4

K

I

1

K

I

2

K

I

3

K

I

4

K

I

5

Used with the

backlight controller

or other circuit.

(Genenal-purpose

output port)

LCD panel (up to 171 segments)

K

S

5

K

S

6

C

*13

*15

To the controller

power supply

LC75886PW

www.onsemi.com

29

Sample Application Circuit 4

1/3 duty, 1/3bias (for use with large panels)

Note: *11. Add a capacitor to the power supply line so that the power supply voltage V

DD

rise time when power is

applied and the power supply voltage V

DD

fall time when power drops are both at least 1 ms, as the

LC75886PW is reset by the V

DET

.

*12. If the

RES

pin is not used for system reset, it must be connected to the power supply V

DD

.

*13. When RC oscillator operating mode is used, the external resistor R

OSC

and the external capacitor C

OSC

must be connected between the OSC pin and GND, and when external clock operating mode is selected the

current protection resistor Rg (4.7 to 47 k) must be connected between the OSC pin and the external clock

output pin (external oscillator). (See the section on the OSC pin peripheral circuit.)

*14. The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between 1 to 10 k)

appropriate for the capacitance of the external wiring so that signal waveforms are not degraded.

*15. The pins to be connected to the controller (CE, CL, DI, DO,

RES

) can handle 3.3 V or 5 V.

Notes on Transferring Display Data from The Controller

When using the LC75886PW in 1/4 duty, applications transfer the display data (D1 to D224) in four operations, and in

1/3 duty, they transfer the display data (D1 to D171) in three operations. In either case, applications should transfer all

of the display data within 30 ms to maintain the quality of displayed image.

TEST

V

SS

+5V

C

R

V

DD

1

V

DD

2

V

DD

*11

10kR1k

C0.047F

S53

COM4/S54

S5

P4/S4

P2/S2

P1/S1

COM3

(P2)

(P3)

(S55)

(S56)

P5

COM1

COM2

P3/S3

(P4)

(P1)

P5/S57

(S57)

(S54)

To the controller

From the

controller

*14

OSC

DO

DI

CL

*12

Key matrix

(up to 30 keys)

RES

CE

S

5

6

/

K

S

2

S

5

/

K

S

1

K

S

3

K

S

4

K

I

1

K

I

2

K

I

3

K

I

4

K

I

5

Used with the

backlight controller

or other circuit.

(Genenal-purpose

output port)

LCD panel (up to 171 segments)

K

S

5

K

S

6

*13

*15

To the controller

power supply

LC75886PW

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30

Notes on the Controller Key Data Read Techniques

1. Timer based key data acquisition

(1) Flowchart

(2) Timing chart

t3 ····· Key scan execution time when the key data agreed for two key scans. (615T[s])

t4 ····· Key scan execution time when the key data did not agree for two key scans and the key scan was executed

again. (1230T[s])

t5 ····· Key address (43H) transfer time

t6 ····· Key data read time

(3) Explanation

In this technique, the controller uses a timer to determine key on/off states and read the key data. The controller

must check the DO state when CE is low every t7 period without fail. If DO is low, the controller recognizes that a

key has been pressed and executes the key data read operation.

The period t7 in this technique must satisfy the following condition.

t7>t4+t5+t6

If a key data read operation is executed when DO is high (DO does not generate a key data read request output), the

read key data (KD1 to KD30) and sleep acknowledge data (SA) will be invalid.

Key data read

processing

YES

NO

DO=”L”

CE=”L”

Controller

determination

(Key on)

Key data read request

Key data read

DO

DI

CE

Key on Key on

Key

address

Key scan

Key input

t4

t7 t7 t7 t7

t3

t6 t6

t5 t5

t3

t5

t6

t3

Controller

determination

(Key on)

Controller

determination

(Key off)

Controller

determination

(Key on)

Controller

determination

(Key off)

T= =

1

f

OSC

1

f

CK

LC75886PW-H

LC75886PW-H

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