LTC3805
16
3805fg
Figure 7. Circuit to Increase the Overcurrent
Threshold for Small Switch Currents
LTC3805
OC
GATE
I
SENSE
R
SENSE1
R
SENSE2
R
SLOPE
GND
3805 F07
I
OC
= 10µA
I
SLOPE
be slowed by using a larger value of SSFLT capacitor. It is
also possible to trip overcurrent protection during a load
step especially if the trip threshold is lowered by making
R
OC
> R
OC(CRIT)
.
Another overcurrent protection strategy is keep the
converter running as current limiting reduces the duty
cycle and the output voltage sags. In this case, the goal
is often keep the converter in normal operation over as
wide a range as possible, including current limiting, and
to trigger the overcurrent trip only to prevent damage. To
implement this strategy use a value of R
OC
smaller than
R
OC(CRIT)
. This also reduces sensitivity to overcurrent trips
caused by transient operation. In the limit, set R
OC
= 0
and connect the OC pin directly to R
SENSE
. This causes an
overcurrent trip near minimum duty cycle or around 6%.
In some cases it may be desirable to increase the trip
threshold even further. In this strategy, the converter is
allowed to operate all the way down to minimum duty
cycle at which point the cycle-by-cycle current limit of
the I
SENSE
pin is lost and switch current goes up propor-
tionally to the output current. Figures 7 and 8 show two
ways
to do this. Figure 7 is for relatively low currents with
relatively large values of R
SENSE
. Using this circuit the
overcurrent trip threshold is increased from 100mV to:
V
OC
=
R
SENSE1
+ R
SENSE2
R
SENSE1
100mV
where it is assumed that the values of R
SENSE1
and
R
SENSE2
are so small that the I
OC
= 10µA threshold adjust-
ment current produces a negligible change in V
OC
.
For larger currents, values of the current sense resistors
must be very small and the circuit of Figure 7 becomes
impractical. The circuit of Figure 8 can be substituted and
the current sense threshold is increased from 100mV to:
V
OC
=
R1+ R2
R1
100mV
where the values of R1 and R2 should be kept below 10Ω
to prevent the I
OC
= 10µA threshold adjustment current
from producing a shift in V
OC
.
External Soft-Start Fault Timeout
The external soft-start is programmed by a capacitor C
SS
from the SSFLT pin to GND. At the initiation of soft-start
the voltage on the SSFLT pin is quickly charged to 0.7V
at which point GATE begins switching. From that point,
aA current charges the voltage on the SSFLT pin until
the voltage reaches about 2.25V at which point soft-start
is over and the converter enters closed-loop regulation.
The soft-start time t
SS(EXT)
as a function of the soft-start
capacitor, C
SS
, is therefore:
t
SS(EXT)
= C
SS
2.25 0.7V
6µA
After soft-start is complete, the voltage on the SSFLT
pin continues to charge to about a final value of 4.75V.
Note that choosing a value of C
SS
less than 5.8nF has
no effect since it would attempt to program an external
soft-start time t
SS(EXT)
less than the mandatory minimum
Figure 8. Circuit to Increase the Overcurrent
Threshold for Large Switch Currents
LTC3805
OC
GATE
I
SENSE
R1
R2
R
SLOPE
GND
3805 F08
R
SENSE
I
OC
= 10µA
I
SLOPE
applications inForMation
LTC3805
17
3805fg
Figure 9. Low Power Isolated Telecom Supply with NPN Preregulator
internal soft-start time t
SS(IN)
= 1.8ms. However, in noisy
environments a small C
SS
can be valuable to limit jitter
in the oscillator.
If there is an overcurrent fault detected on the OC pin, the
LTC3805 enters a shutdown mode while aA current
discharges the voltage on the SSFLT pin from 4.75V to
about 0.7V. The fault timeout t
FTO(EXT)
is therefore:
t
FTO(EXT)
= C
SS
4.75V
0.7V
2µA
At this point, the LTC3805 attempts a restart.
In the event of a persistent fault, such as a short-circuit
on the converter output, the converter enters ahiccup”
mode where it continues to try and restart at repetition
rate determined by C
SS
. If the fault is eventually removed
the converter successfully restarts.
applications inForMation
V
IN
OC
COMP
0.6V FB
GND
OPTO
R20
118k
R19
3.01k
C17
1µF
C01
100µF
6.3V
C21
1µF
R12
100k
R14
22.1k
C22
0.47µF
C15
2200pF
250VAC
R9
274Ω
C19
47pF
C20
47nF
R23
221k
C23, 0.1µF
D1
UPS840
D2
BAS516
D4
BAS516
Q1
FDC2512
D4
BAS516
T1
PA1861NL
C18
330pF
V
IN
V
CC
V
CC
NOTE: CAN ALSO USE TRICKLE CHARGER AS SHOWN IN FIGURE 10
R16, 1.33k
R8
8.66k
R5
221k
11
5
4
3
2
1
6
7
8
5
1
4
2
10
8
7
9
9
1
3
2
6
4
5
10
R6
220Ω
R30
51Ω
C16
150pF
200V
D2
PDZ6.8B
6.8V
Q2
MMBTA42
3805 TA02a
C
IN1
2.2µF
100V
C
IN2
2.2µF
100V
V
IN
+
36V TO
72V
V
IN
D6
BAT54CWTIG
R11
6.8k
R3
221k
U1
LTC3805EMSE
I
TH
GND
SSFLT
RUN
GATE
OC
I
SENSE
SYNCFS
FB
V
CC
R2
R15
2.0k
C02
100µF
6.3V
C03
100µF
6.3V
R
CS
0.068Ω
V
OUT
+
3.3V
3A
V
OUT
+V
OUT
ISO2
NECPS2801-1
U2
LT4430ES6 OPT
LOAD CURRENT (A)
0.01
0
EFFICIENCY (%)
POWER LOSS (W)
20
30
40
50
60
70
0.1
1
3805 TA02b
80
90
100
0
1
10
10
10
36V
48V
60V
72V
V
IN
Efficiency and Power Loss
vs Load Current and V
IN
; V
O
= 3.3V
typical application
LTC3805
18
3805fg
MSOP (MSE) 0911 REV H
0.53 ±0.152
(.021 ±.006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 –0.27
(.007 – .011)
TYP
0.86
(.034)
REF
0.50
(.0197)
BSC
1 2
3
4 5
4.90 ±0.152
(.193 ±.006)
0.497 ±0.076
(.0196 ±.003)
REF
8910
10
1
7
6
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
0.254
(.010)
0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ±0.127
(.035 ±.005)
RECOMMENDED SOLDER PAD LAYOUT
1.68 ±0.102
(.066 ±.004)
1.88 ±0.102
(.074 ±.004)
0.50
(.0197)
BSC
0.305 ± 0.038
(.0120 ±.0015)
TYP
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.68
(.066)
1.88
(.074)
0.1016 ±0.0508
(.004 ±.002)
DETAIL “B”
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
0.05 REF
0.29
REF
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev H)
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ±0.10
(2 SIDES)
0.75 ±0.05
R = 0.125
TYP
2.38 ±0.10
(2 SIDES)
15
106
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DD) DFN REV C 0310
0.25 ±0.05
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 ±0.05
(2 SIDES)2.15 ±0.05
0.50
BSC
0.70 ±0.05
3.55 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

LTC3805EDD#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Programmable Frequency Current Mode Flyback Controller
Lifecycle:
New from this manufacturer.
Delivery:
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