AD7799BRUZ-REEL Datasheet AD7799BRUZ-REEL, AD7798BRUZ, AD7799BRUZ | P22-P24

AD7798/AD7799 Data Sheet

Rev. B | Page 22 of 28

CIRCUIT DESCRIPTION

ANALOG INPUT CHANNEL

The AD7798/AD7799 each have three differential analog input

channels. These are connected to the on-chip buffer amplifier

when the devices are operated in buffered mode, and directly to

the modulator when the devices are operated in unbuffered mode.

In buffered mode (the BUF bit in the mode register is set to 1),

the input channel feeds into a high impedance input stage of the

buffer amplifier. Therefore, the input can tolerate significant

source impedances and is tailored for direct connection to

external resistive-type sensors, such as strain gages or resistance

temperature detectors (RTDs).

When BUF = 0, the parts are operated in unbuffered mode.

This results in a higher analog input current. Note that this

unbuffered input path provides a dynamic load to the driving

source. Therefore, resistor/capacitor combinations on the input

pins can cause gain errors, depending on the output impedance

of the source that is driving the ADC input. Table

17 shows the

allowable external resistance/capacitance values for unbuffered

mode such that no gain error at the 20-bit level is introduced.

Table

17. External Resistance/Capacitance Combination for

Unbuffered Mode (Without 20-Bit Gain Error)

Capacitance (pF)

Resistance (Ω)

50 9 k

100 6 k

500 1.5 k

1000 900

5000 200

The AD7798/AD7799 can be operated in unbuffered mode only

when the gain equals 1 or 2. At higher gains, the buffer is auto-

matically enabled. The absolute input voltage range in buffered

mode is restricted to a range between GND + 100 mV and

– 100 mV. When the gain is set to 4 or higher, the in-amp

is enabled. The absolute input voltage range when the in-amp is

active is restricted to a range between GND + 300 mV and

− 1.1 V. Care must be taken in setting up the common-

mode voltage so that these limits are not exceeded; otherwise,

linearity and noise performance degrade.

The absolute input voltage in unbuffered mode includes the

range between GND − 30 mV and AV

+ 30 mV as a result of

being unbuffered. The negative absolute input voltage limit

allows the possibility of monitoring small true bipolar signals

with respect to GND.

INSTRUMENTATION AMPLIFIER

When the gain equals 4 or higher, the output from the buffer is

applied to the input of the on-chip instrumentation amplifier.

This low noise in-amp means that signals of small amplitude

can be gained within the AD7798/AD7799 while still maintaining

excellent noise performance. For example, when the gain is set

to 64 and the update rate equals 4.17 Hz, the rms noise is 27 nV

typically for the AD7799, which is equivalent to 25.5 bits effective

resolution, or 20 bits peak-to-peak resolution when V

REF

= 5 V.

The AD7798/AD7799 can be programmed to have a gain of 1, 2,

4, 8, 16, 32, 64, or 128 using Bit G2 to Bit G0 in the configuration

from (0 mV to 19.53 mV) to (0 V to 2.5 V), and the bipolar

ranges are from ±19.53 mV to ±2.5 V. When the in-amp is active

(gain ≥ 4), the common-mode voltage (AIN(+) + AIN(−))/2 must

be greater than or equal to 0.5 V.

If the AD7798/AD7799 operate with a reference that has a value

equal to AV

, the analog input signal must be limited to 90% of

REF

/gain when the in-amp is active for correct operation.

BIPOLAR/UNIPOLAR CONFIGURATION

The analog input to the AD7798/AD7799 can accept either

unipolar or bipolar input voltage ranges. A bipolar input range

does not imply that the parts can tolerate negative voltages with

respect to system GND. Unipolar and bipolar signals on the

AIN(+) input are referenced to the voltage on the AIN(–) input.

For example, if AIN(−) is 2.5 V and the ADC is configured for

unipolar mode and a gain of 1, the input voltage range on the

AIN(+) pin is 2.5 V to 5 V.

If the ADC is configured for bipolar mode, the analog input range

on the AIN(+) input is 0 V to 5 V. The bipolar/unipolar option is

chosen by programming the U/

bit in the configuration register.

Data Sheet AD7798/AD7799

Rev. B | Page 23 of 28

DATA OUTPUT CODING

When the ADC is configured for unipolar operation, the output

code is natural (straight) binary with a zero differential input

voltage resulting in a code of 00...00, a midscale voltage resulting

in a code of 100...000, and a full-scale input voltage resulting in

a code of 111...111. The output code for any analog input voltage

can be represented as

Code = (2

× AIN × GAIN)/V

REF

When the ADC is configured for bipolar operation, the output

code is offset binary, with a negative full-scale voltage resulting

in a code of 000...000, a zero differential input voltage resulting

in a code of 100...000, and a positive full-scale input voltage

resulting in a code of 111...111. The output code for any analog

input voltage can be represented as

Code = 2

N – 1

× [(AIN × GAIN/V

REF

) + 1]

where:

AIN is the analog input voltage.

N = 16 for the AD7798, and N = 24 for the AD7799.

BURNOUT CURRENTS

The AD7798/AD7799 each contain two 100 nA constant

current generators—one sourcing current from AV

AIN(+), and one sinking current from AIN(−) to GND. The

currents are switched to the selected analog input pair. Both

currents are either on or off, depending on the burnout current

enable (BO) bit in the configuration register. These currents can

be used to verify that an external transducer is still operational

before attempting to take measurements on that channel. Once

the burnout currents are turned on, they flow into the external

transducer circuit, and a measurement of the input voltage on

the analog input channel can be taken. If the resultant voltage

measured is full scale, the user must determine why this is the

case. A full-scale reading could mean that the front-end sensor

is open circuit, that the front-end sensor is overloaded and is

justified in outputting full scale, or that the reference is absent

and, thus, clamping the data to all 1s.

When reading all 1s from the output, the user should check

these three cases before making a judgment. If the voltage

measured is 0 V, it might indicate that the transducer has short-

circuited. For normal operation, these burnout currents are

turned off by writing a 0 to the BO bit in the configuration

input voltage range specifications with buffers on.

REFERENCE

The common-mode range for these differential inputs is from

GND to AV

. The reference input is unbuffered; therefore,

excessive resistance/capacitance source impedances introduce

gain errors. The reference voltage REFIN (REFIN(+) − REFIN(−))

is 2.5 V nominal, but the AD7798/AD7799 are functional with

reference voltages from 0.1 V to AV

. In applications where the

excitation (voltage or current) for the transducer on the analog

input also drives the reference voltage for the part, the effect of

the low frequency noise in the excitation source is removed

because the application is ratiometric. If the AD7798/AD7799

are used in a nonratiometric application, a low noise reference

should be used.

Recommended 2.5 V reference voltage sources for the AD7798/

AD7799 include the ADR381 and ADR391, which are low noise,

low power references. Also note that the reference inputs provide

a high impedance, dynamic load. Because the input impedance

of each reference input is dynamic, resistor/capacitor combina-

tions on these inputs can cause dc gain errors, depending on the

output impedance of the source driving the reference inputs.

Reference voltage sources such as those recommended above

(for example, ADR391) typically have low output impedances

and are, therefore, tolerant to having decoupling capacitors on

REFIN(+) without introducing gain errors in the system.

Deriving the reference input voltage across an external resistor

means that the reference input sees a significant external source

impedance. External decoupling on the REFIN pins is not

recommended in this type of circuit configuration.

REFERENCE DETECT

The AD7798/AD7799 include on-chip circuitry to detect if

there is a valid reference for conversions or calibrations. This

feature is enabled when the REF_DET bit in the configuration

REFIN(–) pins goes below 0.3 V, or either the REFIN(+) or

REFIN(–) inputs are open circuit, the AD7798/AD7799 detect

that there is no longer a valid reference. In this case, the NOREF

bit of the status register is set to 1. If the AD7798/AD7799 are

performing normal conversions and the NOREF bit becomes

active, the conversion results revert to all 1s. Therefore, it is not

necessary to continuously monitor the status of the NOREF bit

when performing conversions. It is only necessary to verify its

status if the conversion result read from the ADC data register

is all 1s. If the AD7798/AD7799 are performing an offset of full-

scale calibration and the NOREF bit becomes active, the updating

of the respective calibration registers is inhibited to avoid loading

incorrect coefficients to these registers, and the ERR bit in the

status register is set. If the user is concerned about verifying that

a valid reference is in place every time a calibration is performed,

the status of the ERR bit should be checked at the end of the

calibration cycle.

RESET

The circuitry and serial interface of the AD7798/AD7799 can

be reset by writing 32 consecutive 1s to the device. This resets

the logic, the digital filter, and the analog modulator, and all

on-chip registers are reset to their default values. A reset is

automatically performed upon power-up. When a reset is

initiated, the user must allow a period of 500 µs before

accessing an on-chip register. A reset is useful if the serial

interface becomes asynchronous due to noise on the SCLK line.

AD7798/AD7799 Data Sheet

Rev. B | Page 24 of 28

MONITOR

Along with converting external voltages, the ADC can be used

to monitor the voltage on the AV

pin. When Bits CH2 to CH0

equal 1, the voltage on the AV

pin is internally attenuated by 6,

and the resulting voltage is applied to the ∑-∆ modulator using

an internal 1.17 V reference for analog-to-digital conversion.

This is useful because variations in the power supply voltage

can be monitored.

CALIBRATION

The AD7798/AD7799 provide four calibration modes that can

be programmed via the mode bits in the mode register. These

are internal zero-scale calibration, internal full-scale calibration,

system zero-scale calibration, and system full-scale calibration,

which effectively reduce the offset error and full-scale error to

the order of the noise. After each conversion, the ADC con-

version result is scaled using the ADC calibration registers

before being written to the data register. The offset calibration

coefficient is subtracted from the result prior to multiplication

by the full-scale coefficient.

To start a calibration, write the relevant value to the MD2 to

MD0 bits in the mode register. After the calibration is complete,

the contents of the corresponding calibration registers are

updated, the

RDY

bit in the status register is set, the DOUT/

RDY

pin goes low (if

is low), and the AD7798/AD7799

revert to idle mode.

During an internal zero-scale or full-scale calibration, the

respective zero-scale and full-scale input are automatically

connected internally to the ADC input pins. A system calibration,

however, expects the system zero-scale and system full-scale

voltages to be applied to the ADC pins before the calibration

mode is initiated. In this way, external ADC errors are removed.

From an operational point of view, a calibration should be

treated like an ADC conversion. A zero-scale calibration (if

required) should always be performed before a full-scale

calibration. System software should monitor the

RDY

bit in the

status register or the DOUT/

RDY

pin to determine the end of

calibration via a polling sequence or an interrupt-driven routine.

Both an internal offset calibration and system offset calibration

take two conversion cycles. An internal offset calibration is not

needed because the ADC itself removes the offset continuously.

To perform an internal full-scale calibration, a full-scale input

voltage is automatically connected to the selected analog input

for this calibration. When the gain equals 1, a calibration takes

two conversion cycles to complete. For higher gains, four

conversion cycles are required to perform the full-scale

calibration. DOUT/

RDY

goes high when the calibration is

initiated and returns low when the calibration is complete. The

ADC is placed in idle mode following a calibration. The measured

full-scale coefficient is placed in the full-scale register of the

selected channel. Internal full-scale calibrations cannot be

performed when the gain equals 128. A factory calibration

is performed at this gain setting, and the factory value is

automatically loaded into the full-scale register when the gain is

set to 128. With this gain setting, a system full-scale calibration

can be performed. A full-scale calibration is required each time

the gain of a channel is changed to minimize the full-scale error.

An internal full-scale calibration can only be performed at

specified update rates. For gains of 1, 2, and 4, an internal full-

scale calibration can be performed at any update rate. However,

for higher gains, internal full-scale calibrations must be performed

when the update rate is less than or equal to 16.7 Hz, 33.2 Hz,

or 50 Hz. Because the full-scale error does not vary with the

update rate, a calibration at one update rate is valid for all update

rates (assuming the gain or reference source is not changed).

A system full-scale calibration takes two conversion cycles to

complete, irrespective of the gain setting. A system full-scale

calibration can be performed at all gains and update rates. If

system offset calibrations are performed along with system full-

scale calibrations, the offset calibration should be performed

before the system full-scale calibration is initiated.

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AD7799BRUZ-REEL

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Manufacturer:

Analog Devices Inc.

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Analog to Digital Converters - ADC 3-Ch 24-Bit Low Noise Low Power

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