NTSX2102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 11 February 2013 13 of 20
NXP Semiconductors
NTSX2102
Dual supply translating transceiver; open drain; auto direction sensing
14.3 Input driver requirements
As the NTSX2102 is a switch type translator, properties of the input driver directly affect
the output signal. The external open-drain driver applied to an I/O, determines the static
current sinking capability of the system. The maximum data rate, output transition times
(t
THL
, t
TLH
) and propagation delays (t
PHL
, t
PLH
) are dependent upon the output impedance
and edge-rate of the external driver.
14.4 Output load considerations
The maximum lumped capacitive load that can be driven is dependent upon the one-shot
pulse duration and has been tuned to 600 pF. In cases with higher capacitive loading,
there is a risk that the output does not reach the positive rail within the one-shot pulse
duration. To avoid excessive capacitive loading and to ensure correct triggering of the
one-shot, use short trace lengths and low capacitance connectors on NTSX2102 PCB
layouts. The length of the PCB trace should be such that the round-trip delay of any
reflection is within the one-shot pulse duration. Such a length ensures low impedance
termination and avoids output signal oscillations and one-shot retriggering.
14.5 Output enable (OE)
An output enable input (OE) is used to disable the device. Setting OE = LOW causes all
I/Os to assume the high-impedance OFF-state.
14.6 Power-up
When either of the supplies V
CC(n)
is at 0 V, outputs are in the high-impedance OFF-state.
One of the advantages of NTSX translators is that either V
CC(A)
or V
CC(B)
may be powered
up first. To reduce dissipation during power-up, ensure that output enable (OE) is defined.
Connect it via a pull down resistor to GND or, if the application allows, hardwired to V
CC(A)
.
If the OE pin is hardwired to V
CC(A)
, either supply can be powered up or down first. If a pull
down is used, the following sequences are recommended.
For power-up:
1. Apply power to either supply pin
2. Apply power to other supply pin
3. Enable the device by driving OE HIGH
For power down:
1. Disable the device by driving OE LOW
2. Remove power from either supply pin
3. Remove power from other supply pin
14.7 Pull-up resistors on I/O lines
Each A port I/O requires a pull-up resistor to V
CC(A)
, and each B port I/O requires a pull-up
resistor to V
CC(B)
. Choose the magnitude of the pull-up resistors to ensure that the output
voltage levels meet the application requirement.
NTSX2102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 11 February 2013 14 of 20
NXP Semiconductors
NTSX2102
Dual supply translating transceiver; open drain; auto direction sensing
15. Package outline
Fig 12. Package outline SOT902-2 (XQFN8)
References
Outline
version
European
projection
Issue date
IEC JEDEC JEITA
SOT902-2 - - -
MO-255
- - -
sot902-2_po
10-11-02
11-03-31
Unit
(1)
mm
max
nom
min
0.5 0.05
0.00
1.65
1.60
1.55
1.65
1.60
1.55
0.55 0.5
0.15
0.10
0.05
0.1 0.05
A
Dimensions
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
XQFN8: plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.6 x 1.6 x 0.5 mm
SOT902-2
A
1
b
0.25
0.20
0.15
DEee
1
L
0.35
0.30
0.25
L
1
vw
0.05
yy
1
0.05
0 1 2 mm
scale
terminal 1
index area
B
A
D
E
X
C
y
C
y
1
terminal 1
index area
3
L
L
1
b
e
1
e
AC
B
v
Cw
2
1
5
6
7
metal area
not for soldering
8
4
A
1
A
detail X
NTSX2102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 11 February 2013 15 of 20
NXP Semiconductors
NTSX2102
Dual supply translating transceiver; open drain; auto direction sensing
Fig 13. Package outline SOT1309-1 (XQFN8)
References
Outline
version
European
projection
Issue date
IEC JEDEC JEITA
SOT1309-1
MO-255
sot1309-1_po
11-08-18
11-08-23
Unit
mm
max
nom
min
0.50 0.025
0.00
0.25 1.45 1.25
0.30 0.40 0.05
A
Dimensions
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included
XQFN8: plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.4 x 1.2 x 0.5 mm
SOT1309-1
A
1
A
3
bDEee
1
0.8
L L
1
v
0.10
wy
0.05
y
1
0.20 1.40 1.20 0.40.127 0.05
0.25 0.350.15 1.35 1.15
0.35 0.45
0 3 mm
scale
detail X
e
1
X
AC
B
v
wC
D
E
A
3
A
1
A
B
terminal 1
index area
terminal 1
index area
A
C
y
C
y
1
L
1
L
b
b
e
4
68
5
2
1

NTSX2102GU8H

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Translation - Voltage Levels NTSX2102GU8/XQFN8///REEL 7 Q3 NDP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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