RT9017-20GBR

RT9017
7
DS9017-05 April 2011 www.richtek.com
Time (5ms/Div)
V
IN
= 4.5V
C
IN
= C
OUT
= 1uF
Noise
Noise (μV)
V
OUT
= 1.8V
No Load
400
200
0
-200
-400
f = 10Hz to 100kHz
RT9017
8
DS9017-05 April 2011www.richtek.com
Applications Information
Like any low-dropout regulator, the external capacitors used
with the RT9017 must be carefully selected for regulator
stability and performance. Using a capacitor whose value
is > 1μF on the RT9017 input and the amount of
capacitance can be increased without limit. The input
capacitor must be located a distance of not more than
0.5 inch from the input pin of the IC and returned to a
clean analog ground. Any good quality ceramic or tantalum
can be used for this capacitor. The capacitor with larger
value and lower ESR (equivalent series resistance) provides
better PSRR and line-transient response.
The output capacitor must meet both requirements for
minimum amount of capacitance and ESR in all LDOs
application. The RT9017 is designed specifically to work
with low ESR ceramic output capacitor in space-saving
and performance consideration. Using a ceramic capacitor
whose value is at least 1μF with ESR is > 20mΩ on the
RT9017 output ensures stability. The RT9017 still works
well with output capacitor of other types due to the wide
stable ESR range. Figure 1. shows the curves of allowable
ESR range as a function of load current for various output
capacitor values. Output capacitor of larger capacitance
can reduce noise and improve load transient response,
stability, and PSRR. The output capacitor should be located
not more than 0.5 inch from the V
OUT
pin of the RT9017
and returned to a clean analog ground.
Thermal Considerations
Thermal protection limits power dissipation in RT9017.
When the operation junction temperature exceeds 165°C,
the OTP circuit starts the thermal shutdown function and
turns the pass element off. The pass element turn on again
after the junction temperature cools by 30°C.
RT9017 lowers its OTP trip level from 165°C to 110°C
when output short circuit occurs (V
OUT
< 0.4V) as shown
in Figure 2. This limits IC case temperature under 100°C
and provides maximum safety to end users when output
short circuit occurs.
Figure 1
Enable Function
The RT9017 features an LDO regulator enable/disable
function. To assure the LDO regulator will switch on, the
EN turn on control level must be greater than 1.2 volts.
The LDO regulator will go into the shutdown mode when
the voltage on the EN pin falls below 0.4 volts. For to
protecting the system, the RT9017 have a quick-discharge
function. If the enable function is not needed in a specific
application, it may be tied to V
IN
to keep the LDO regulator
in a continuously on state.
Figure 2. Short Circuit Thermal Folded Back Protection
when Output Short Circuit Occurs
V
OUT
Short to GND
0.4V
V
OUT
I
OUT
TSD
OTP Trip Point
165 C
°
110 C
°
110 C
°
80 C
°
IC Temperature
Region of Stable C
OUT
ESR vs. Load Current
0.00
0.01
0.10
1.00
10.00
100.00
0 100 200 300 400 500
Load Current (mA)
C
OUT
ESR ()
C
OUT
= 1uF
100
10
1
RT9017-15PB
C
IN
= 1μF, X7R
Unstable Region
Stable Region
Unstable Region (Simulation Verity)
Region of Stable C
OUT
ESR (Ω)
RT9017
9
DS9017-05 April 2011 www.richtek.com
Figure 3. Derating Curve for Packages
For continuous operation, do not exceed absolute
maximum operation junction temperature 125°C. The
power dissipation definition in device is :
P
D
= (V
IN
V
OUT
) x I
OUT
+ V
IN
x I
Q
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
P
D(MAX)
= ( T
J(MAX)
- T
A
) / θ
JA
Where T
J(MAX)
is the maximum operation junction
temperature 125°C, T
A
is the ambient temperature and the
θ
JA
is the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT9017, where T
J(MAX)
is the maximum junction
temperature of the die (125°C) and T
A
is the maximum
ambient temperature. The junction to ambient thermal
resistance (θ
JA
is layout dependent) for SOT-23-3/SOT-
23-5 package is 250°C/W and WDFN-6L 2x2 package is
165°C/W on standard JEDEC 51-3 thermal test board.
The maximum power dissipation at T
A
= 25°C can be
calculated by following formula :
P
D(MAX)
= (125°C25°C)/250 = 400 mW (SOT-23-3/
SOT-23-5)
P
D(MAX)
= (125°C25°C)/333 = 300 mW (SC-70-5)
The maximum power dissipation depends on operating
ambient temperature for fixed T
J(MAX)
and thermal
resistance θ
JA
. For RT9017 packages, the Figure 3. of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
0
100
200
300
400
500
600
700
0 25 50 75 100 125 150
Ambient Temperature (°C)
Power Dissipation (mW)
SOT-23-3/
SOT-23-5
WDFN-6L 2x2
(°C)

RT9017-20GBR

Mfr. #:
Manufacturer:
Description:
IC REG LINEAR 2V 500MA SOT23-5R
Lifecycle:
New from this manufacturer.
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