LTM8033
13
8033fb
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APPLICATIONS INFORMATION
Frequency Selection
The LTM8033 uses a constant frequency PWM architecture
that can be programmed to switch from 200kHz to 2.4MHz
by using a resistor tied from the RT pin to ground. Table 2
provides a list of R
T
resistor values and their resulting
frequencies.
Table 2. Switching Frequency vs R
T
Value
SWITCHING FREQUENCY (MHz) R
T
VALUE (kΩ)
0.2 215
0.3 137
0.4 100
0.5 76.8
0.6 63.4
0.7 52.3
0.8 44.2
0.9 38.3
1 34
1.2 25.5
1.4 21.5
1.6 17.8
1.8 14.7
2 12.1
2.2 9.76
2.4 8.25
Operating Frequency Trade-Offs
It is recommended that the user apply the optimal R
T
value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8033 is flexible enough to accommodate a wide range
of operating frequencies, a haphazardly chosen one may
result in undesirable operation under certain operating or
fault conditions. A frequency that is too high can reduce
efficiency, generate excessive heat or even damage the
LTM8033 if the output is overloaded or short-circuited.
A frequency that is too low can result in a final design
that has too much output ripple or too large of an output
capacitor.
BIAS Pin Considerations
The BIAS pin is used to provide drive power for the internal
power switching stage and operate other internal circuitry.
For proper operation, it must be powered by at least 2.8V. If
the output voltage is programmed to 2.8V or higher, BIAS
may be simply tied to V
OUT
. If V
OUT
is less than 2.8V, BIAS
can be tied to V
IN
or some other voltage source. If the BIAS
pin voltage is too high, the efficiency of the LTM8033 may
suffer. The optimum BIAS voltage is dependent upon many
factors, such as load current, input voltage, output voltage
and switching frequency, but 4V to 5V works well in many
applications. In all cases, ensure that the maximum voltage
at the BIAS pin is less than 25V and that the sum of V
IN
and BIAS is less than 56V. If BIAS power is applied from
a remote or noisy voltage source, it may be necessary to
apply a decoupling capacitor locally to the pin.
Load Sharing
Two or more LTM8033 may be paralleled to produce higher
currents. To do this, tie the V
IN
, ADJ, V
OUT
and SHARE
pins of all the paralleled LTM8033 together. To ensure that
paralleled modules start up together, the RUN/SS pins
may be tied together as well. If the RUN/SS pins are not
tied together, make sure that the same valued soft-start
capacitors are used for each module. Current sharing can
be improved by synchronizing the LTM8033s. An example
of two LTM8033 configured for load sharing is given in
the Typical Applications section.
Burst Mode Operation
To enhance efficiency at light loads, the LTM8033 auto
-
matically switches to Burst Mode operation which keeps
the output capacitor charged to the proper voltage while
minimizing the input quiescent current. During Burst Mode
operation, the L
TM8033 delivers single cycle bursts of
current to the output capacitor followed by sleep periods
where the output power is delivered to the load by the output
capacitor. In addition, V
IN
and BIAS quiescent currents are
reduced to typically 30μA and 75μA respectively during
the sleep time. As the load current decreases towards a
LTM8033
14
8033fb
For more information www.linear.com/LTM8033
APPLICATIONS INFORMATION
no-load condition, the percentage of time that the LTM8033
operates in sleep mode increases and the average input
current is greatly reduced, resulting in higher efficiency.
Burst Mode operation is enabled by tying SYNC to GND. To
disable Burst Mode operation, tie SYNC to a stable voltage
above 0.7V. Do not leave the SYNC pin floating.
Minimum Input Voltage
The LTM8033 is a step-down converter, so a minimum
amount of headroom is required to keep the output in
regulation. In addition, the input voltage required to turn
on is higher than that required to run, and depends upon
BIAS power whether RUN/SS is used. If BIAS is available
before V
OUT
ramps up, the minimum V
IN
voltage to start
may be reduced. As shown in the Typical Performance
Characteristics section, the minimum input voltage to
run a 3.3V output at light load is only about 3.6V, but, if
RUN/SS is pulled up to V
IN
, it takes 5.6V
IN
to start. If the
LTM8033 is enabled with the RUN/SS pin, the minimum
voltage to start at light loads is lower, about 4.2V. Similar
curves detailing this behavior of the LTM8033 for other
outputs are also included in the Typical Performance
Characteristics section.
Soft-Start
The RUN/SS pin can be used to soft-start the LTM8033,
reducing the maximum input current during start-up. The
RUN/SS pin is driven through an external RC filter to cre
-
ate a voltage ramp at this pin. Figure 2 shows the start-up
and shutdown waveforms with the soft-start circuit. By
choosing an appropriate RC time constant, the peak start-
up current can be reduced to the current that is required to
regulate the output, with no overshoot. Choose the value
of the resistor so that it can supply at least 20μA when
the RUN/SS pin reaches 2.5V
.
Frequency Foldback
The LTM8033 is equipped with frequency foldback which
acts to reduce the thermal and energy stress on the internal
power elements during a short-circuit or output overload
condition. If the LTM8033 detects that the output has fallen
out of regulation, the switching frequency is reduced as a
function of how far the output is below the target voltage.
This in turn limits the amount of energy that can be delivered
to the load under fault. During the start-up time, frequency
foldback is also active to limit the energy delivered to the
potentially large output capacitance of the load.
Figure 2. To Soft-Start the LTM8033, Add a Resistor and Capacitor to the RUN/SS Pin
V
OUT
2V/DIV
INTERNAL
INDUCTOR
CURRENT
1A/DIV
V
RUN/SS
2V/DIV
2ms/DIV
8033 F02
GND
RUN
RUN/SS
0.22µF
15k
LTM8033
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8033fb
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Synchronization
The internal oscillator of the LTM8033 can be synchro-
nized by applying an external 250kHz to 2MHz clock to
the SYNC pin. Do not leave this pin floating. Ground the
SYNC pin if the synchronization function is not used.
When synchronizing the L
TM8033, select an R
T
resistor
value that corresponds to an operating frequency 20%
lower than the intended synchronization frequency (see
the Frequency Selection section).
In addition to synchronization, the SYNC pin controls Burst
Mode behavior. If the SYNC pin is driven by an external
clock, or pulled up above 0.7V, the LTM8033 will not en
-
ter Burst Mode operation, but will instead skip pulses to
maintain regulation instead.
APPLICATIONS INFORMATION
Figure 3. The Input Diode Prevents a Shorted Input from Discharging
a Backup Battery Tied to the Output. It Also Protects the Circuit from a
Reversed Input. The LTM8033 Runs Only When the Input is Present
8033 F03
V
IN
RUN/SS
SHARE
V
IN
V
OUT
V
OUT
AUX
BIAS
ADJ
RT
LTM8033
SYNC GND
Shorted Input Protection
Care needs to be taken in systems where the output will be
held high when the input to the LTM8033 is absent. This
may occur in battery charging applications or in battery
backup systems where a battery or some other supply is
diode OR-ed with the LTM8033’s output. If the V
IN
pin is
allowed to float and the RUN/SS pin is held high (either
by a logic signal or because it is tied to V
IN
), then the
LTM8033’s internal circuitry will pull its quiescent current
through its internal power switch. This is fine if your system
can tolerate a few milliamps in this state. If you ground the
RUN/SS pin, the SW pin current will drop to essentially
zero. However, if the V
IN
pin is grounded while the output
is held high, then parasitic diodes inside the LTM8033 can
pull large currents from the output through the V
IN
pin.
Figure 3 shows a circuit that will run only when the input
voltage is present and that protects against a shorted or
reversed input.

LTM8033IY

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators [Tin-Lead SnPb BGA] Ultralow EMI 36Vin, 3A Step Down Module Regulator
Lifecycle:
New from this manufacturer.
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