MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
10 ______________________________________________________________________________________
During the conversion process, SCLK is ignored. Only
after a conversion is complete will SCLK cause serial
data to be output. Falling edges on CNVST, during an
active conversion process, interrupt the current conver-
sion and cause the input multiplexer to switch to CH1.
To reinitiate a conversion on CH0, it is necessary to
allow for a conversion to be complete and all of the
data to be read out. Once a conversion has been com-
pleted, the MAX1117/MAX1118/MAX1119 will go into
AutoShutdown™ mode (<1µA typ) until the next conver-
sion is initiated.
ACTIVE POWER-DOWN MODE
CNVST
SCLK
DOUT
CH0
IDLE LOW IDLE LOW
CH0
t
csh
t
conv
t
cp
t
ccs
t
chz
t
cl
t
cd
D7 (MSB) D6 D5 D4 D3 D2 D1 D0
t
csd
t
ch
Figure 6a. Conversion and Interface Timing, Conversion on CH0 with SCLK Idle Low
ACTIVE POWER-DOWN MODE
CNVST
SCLK
DOUT
CH0
IDLE HIGH
IDLE HIGH
CH0
t
csh
t
conv
t
cp
t
ccs
t
chz
t
cl
t
cd
D7 (MSB) D6 D5 D4 D3 D2 D1 D0
t
csd
t
ch
Figure 6b. Conversion and Interface Timing, Conversion on CH0 with SCLK Idle High
AutoShutdown is a trademark of Maxim Integrated Products.
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
______________________________________________________________________________________ 11
ACTIVE POWER-DOWN MODE
CNVST
SCLK
D
OUT
CH0
IDLE LOW IDLE LOW
CH0 CH1CH1
t
csh
t
conv
t
cp
t
ccs
t
csl
t
chz
t
cl
t
cd
D7 (MSB) D6 D5 D4 D3 D2 D1 D0
t
csd
t
ch
Figure 6c. Conversion and Interface Timing, Conversion on CH1 with SCLK Idle Low
ACTIVE POWER-DOWN MODE
CNVST
SCLK
D
OUT
CH0
IDLE HIGHIDLE HIGH
CH0 CH1CH1
t
csh
t
conv
t
cp
t
ccs
t
csl
t
chz
t
cl
t
cd
D7 (MSB) D6 D5 D4 D3 D2 D1 D0
t
csd
t
ch
Figure 6d. Conversion and Interface Timing, Conversion on CH1 with SCLK Idle High
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
12 ______________________________________________________________________________________
Applications Information
Power-On Reset
When power is first applied, the MAX1117/MAX1118/
MAX1119 are in AutoShutdown state (<1μA typ). A conver-
sion can be started by toggling CNVST high to low. Powering
up the MAX1117/MAX1118/MAX1119 with CNVST low will
not start a conversion. Conversions initiated prior to the
external reference settling (MAX1118) will result in errors.
Thus, it is necessary to allow the external reference to stabi-
lize prior to initiating a conversion.
AutoShutDown and Supply Current
Requirements
The MAX1117/MAX1118/MAX1119 are designed to
automatically shutdown once a conversion is complete
without any external control. An input sample and con-
version process will typically take 5µs to complete, dur-
ing which time the supply current to the analog
sections of the device is fully on. All analog circuitry is
shutdown after a conversion completes, which results
in a supply current of <1µA (see Shutdown Current vs.
Supply Voltage Plot in the Typical Operating
Characteristics). The digital conversion result is main-
tained in a static register and is available for access
through the serial interface at any time.
The power consumption consequence of this architec-
ture is dramatic when relatively slow conversion rates
are needed. For example, at a conversion rate of
10ksps, the average supply current for the MAX1117 is
15µA, while at 1ksps it drops to 1.5µA and at 0.1ksps it
is just 0.3µA, or a miniscule 1µW of power consumption
(see Average Supply Current vs. Conversion Rate Plot
in the Typical Operating Characteristics).
External Voltage Reference (MAX1118)
Connect an external reference between +1V and V
DD
at the REF pin. The DC input impedance at REF is
extremely high, consisting of leakage current only
(10nA typ). During a conversion, the reference must be
able to deliver up to 20µA average load current and
have an output impedance of 100Ω or less. If the refer-
ence has higher output impedance or is noisy, bypass
it close to the REF pin with a 10nF or larger capacitor.
Transfer Function
Figure 7 depicts the input/output transfer function.
Output coding is binary with a +2.048V reference 1LSB
= 8mV (V
REF
/256).
Layout, Grounding, Bypassing
For best performance, the board layout should ensure
that digital and analog signal lines are separated from
each other. Do not run analog and digital (especially
clock) lines parallel to one another or run digital lines
underneath the ADC package.
Figure 8 shows the recommended system-ground con-
nections. A single-point analog ground (star-ground
point) should be established at the ADC ground.
Connect all analog grounds to the star ground. The
ground return to the power supply for the star ground
OUTPUT CODE
FULL-SCALE
TRANSITION
11111111
11111110
11111101
00000011
00000010
00000001
00000000
123
0
FS
FS - 1 1/2 LSB
FS = V
REF
1LSB = V
REF
256
INPUT VOLTAGE (LSB)
Figure 7. Input/Output Transfer Function
GND
+3V/+5V
SYSTEM POWER SUPPLIES
V
DD
DGNDV
DD
1μF
10Ω*
0.1μF
GND
*OPTIONAL
DIGITAL
CIRCUITRY
MAX1117
MAX1118
MAX1119
Figure 8. Power-Supply Connections

MAX1118EKA+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 2Ch Single-Supply Low Pwr Serial 8-Bit
Lifecycle:
New from this manufacturer.
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