HIP4083APZ Datasheet HIP4083ABZ, HIP4083APZ, HIP4083EVAL | P4-P6

Typical Application: High Side Switch

80V

HIP4083

12V

GND

AHI

BHI

CHI

AHO

BHO

CHO

DIS

REFRESH

MICRO-

PROCESSOR

BOOT STRAP CAPACITOR

AND DIODE REQUIRED

LIGHT

Pin Descriptions

NUMBER SYMBOL DESCRIPTION

AHB

BHB

CHB

(xHB)

Gate driver supplies. One external bootstrap diode and one capacitor are required for each. The bootstrap diode

and capacitor may be omitted when the HIP4083 is used to drive the lower gates in three phase full bridge

applications. In this case, tie all three xHB pins to V

and tie the xHS pins to the sources of the lower FETs. In

full bridge applications, the lower FETs must be turned on first at start up to refresh the bootstrap capacitors. In

high side switch applications, the load will keep xHS low and refresh should happen automatically at start up.

AHI

BHI

CHI

(xHI

)

Logic level inputs. Logic at these three pins controls the three output drivers, AHO, BHO and CHO. When xHI

low, xHO is high. When xHI

is high, xHO is low. DIS (Disable) overrides all input signals. xHI can be driven by

signal levels of 0V to 15V (no greater than V

Chip ground.

13 UVLO Undervoltage setting. A resistor can be connected between this pin and V

to program the under voltage set

point - see Figure 7. With this pin not connected the undervoltage set point is typically 7V. When this pin is tied to

, the undervoltage set point is typically 6.2V.

4 DIS Disable input. Logic level input that when taken high sets all three outputs low. DIS high overrides all other inputs.

When DIS is taken low the outputs are controlled by the other inputs. DIS can be driven by signal levels of 0V to

15V (no greater than V

AHO

BHO

CHO

(xHO)

Gate connections. Connect to the gates of the power MOSFETs in each phase.

AHS

BHS

CHS

(xHS)

MOSFET source connection. Connect the sources of the power MOSFETs and the negative side of the bootstrap

capacitors to these pins. In high side switch applications, 2mA of current will flow out of these pins into the load

when the upper FETs are off. This current is necessary to guarantee that the upper FETs stay off. This current

tends to pull xHS high. For proper refresh, the load must pull the voltage on xHS down to at least 7V below V

For example, when V

= 12V, xHS must be pulled down to 5V. Therefore, the minimum load necessary for

proper refresh is given by the following equation: R

MIN

= 5V/2mA = 2.5kΩ. So in this case, if the load has an

impedance less than 5kΩ, refresh will happen automatically at start up.

12 V

Positive supply rail. Bypass this pin to V

with a capacitor >1µF. In applications where the bus voltage and chip

are at the same potential, it is a good idea to run a separate line from the supply to each. This greatly

simplifies the filtering requirements.

HIP4083HIP4083

Absolute Maximum Ratings T

= 25°C Thermal Information

Supply Voltage, V

. . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to 16V

Logic I/O Voltages . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V

+0.3V

Voltage on xHS . . . . . . . . . -6V (Transient) to 85V (-40°C to 150°C)

Voltage on xHB . . . . . . . . . . . . . . . . . . . . V

xHS

-0.3V to V

xHS

Voltage on xLO . . . . . . . . . . . . . . . . . . . . . V

-0.3V to V

+0.3V

Voltage on xHO . . . . . . . . . . . . . . . . . . . .V

xHS

-0.3V to V

xHB

+0.3V

Phase Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/ns

Operating Conditions

Supply Voltage, V

. . . . . . . . . . . . . . . . . . . . . . . . . +7.0V to +15V

Voltage on xHS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 80V

Voltage on xHB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

xHS

Operating Ambient Temperature Range . . . . . . . . . .-40°C to 125°C

Thermal Resistance (Typical, Note 1)

(°C/W)

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Maximum Storage Temperature Range . . . . . . . . . . -65°C to 150°C

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150°C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C

(SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1. θ

is measured with the component mounted on an evaluation PC board in free air.

2. All voltages are relative to V

unless otherwise specified.

3. x = A, B and C. For example, xHS refers to AHS, BHS and CHS.

Electrical Specifications V

= V

xHB

= 12V, V

= V

xHS

= 0V, Gate Capacitance (C

GATE

) = 1000pF, R

= ∞

PARAMETER TEST CONDITIONS

= 25°C

= -40°C TO

150°C

UNITSMIN TYP MAX MIN MAX

SUPPLY CURRENTS AND UNDER VOLTAGE PROTECTION

Quiescent Current xHI = 5V 0.5 1.5 2.25 0.25 2.3 mA

Operating Current f = 20kHz, 50% Duty Cycle 1.0 2.0 2.5 0.75 3.0 mA

xHB On Quiescent Current xHI

= 0V 65 100 240 45 250 µA

xHB Off Quiescent Current xHI

= 5V 0.6 0.85 1.3 0.5 1.4 mA

xHB Operating Current f = 20kHz, 50% Duty Cycle 0.6 0.85 1.2 0.5 1.3 mA

Rising Undervoltage Threshold R

OPEN 6.2 7.0 8.0 6.1 8.1 V

Falling Undervoltage Threshold R

OPEN 5.75 6.5 7.5 5.25 7.6 V

Minimum Undervoltage Threshold R

= V

5.0 6.2 6.9 4.5 7.0 V

INPUT PINS: AHI, BHI, CHI AND DIS

Low Level Input Voltage - - 1.0 - 0.8 V

High Level Input Voltage 2.5 - - 2.7 - V

Input Voltage Hysteresis - 35 - - - mV

Low Level Input Current V

= 0V -145 -100 -60 -150 -50 µA

High Level Input Current V

= 5V -1 - +1 -10 +10 µA

GATE DRIVER OUTPUT PINS: AHO, BHO, AND CHO

Average Turn-On Current V

OUT

0V to 5V 100 240 400 50 500 mA

Average Turn-Off Current V

OUT

to 4V 150 300 450 100 550 mA

HIP4083HIP4083

Switching Specifications V

= V

xHB

= 12V, V

= V

xHS

= 0V, C

GATE

= 1000pF

PARAMETER TEST CONDITIONS

= 25°C

= -40°C TO

150°C

UNITSMIN TYP MAX MIN MAX

Turn-Off Propagation Delay (xHI - xHO) No Load - 60 80 90 ns

Turn-On Propagation Delay (xHI - xHO) No Load - 65 90 100 ns

Rise Time (10 - 90%) C

GATE

= 1000pF - 35 60 - 65 ns

Fall Time (90 - 10%) C

GATE

= 1000pF - 30 50 - 55 ns

Disable Turn-Off Propagation Delay No Load - 65 - - 100 ns

Disable to Output Enable (DIS - xHO) No Load - 70 - - 100 ns

Typical Performance Curves

FIGURE 1. V

SUPPLY CURRENT vs V

SUPPLY VOLTAGE FIGURE 2. V

SUPPLY CURRENT vs SWITCHING FREQUENCY

FIGURE 3. FLOATING SUPPLY OFF BIAS CURRENT FIGURE 4. FLOATING SUPPLY ON BIAS CURRENT

-60 -40 -20

0 20 40 60 80 100 120 140 160

1.0

1.2

1.4

1.6

1.8

2.0

JUNCTION TEMPERATURE (°C)

SUPPLY CURRENT (mA)

= 16V

= 15V

= 12V

= 10V

= 8V

= 7V

-60 -40 -20 0 20 40 60 80 100 120 140 160

3.0

3.5

4.0

4.5

JUNCTION TEMPERATURE (°C)

SUPPLY CURRENT (mA)

200kHz

100kHz

50kHz

10kHz

20kHz

-60 -40 -20 0 20 40 60 80 100 120 140 160

650

700

750

800

850

900

950

JUNCTION TEMPERATURE (°C)

xHB SUPPLY OFF CURRENT (µA)

XHB

- V

XHS

) = 15V

XHB

- V

XHS

) = 14V

XHB

- V

XHS

) = 10V

XHB

- V

XHS

) = 8V

XHB

- V

XHS

) = 7V

XHB

- V

XHS

) = 13V

XHB

- V

XHS

) = 12V

-60 -40 -20 0 20 40 60 80 100 120 140 160

100

110

120

JUNCTION TEMPERATURE (°C)

xHB ON SUPPLY CURRENT (µA)

XHB

- V

XHS

) = 15V

XHB

- V

XHS

) = 12V

XHB

- V

XHS

) = 10V

XHB

- V

XHS

) = 8V

XHB

- V

XHS

) = 7V

HIP4083HIP4083

P1-P3 P4-P6 P7-P9 P10-P10

HIP4083APZ

Mfr. #:

Buy HIP4083APZ

Manufacturer:

Renesas / Intersil

Description:

Gate Drivers 3 PHS HI SIDE N-CH DRVR 16 DI

Lifecycle:

New from this manufacturer.

Delivery:

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HIP4083APZ

HIP4083APZ

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