7
LTC1060
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operation of the device. By tying Pin 12 to 1/2 supplies
(which should be the AGND potential), the LTC1060
operates in the 100:1 mode. The 1/2 supply bias of Pin 12
can vary around the 1/2 supply potential without affecting
the 100:1 filter operation. This is shown in Table 1.
When Pin 12 is shorted to the negative supply pin, the filter
operation is stopped and the bandpass and lowpass
outputs act as a S/H circuit holding the last sample. The
hold step is 20mV and the droop rate is 150µV/second!
Table 1
VOLTAGE RANGE OF PIN 12
TOTAL POWER SUPPLY FOR 100:1 OPERATION
5V 2.5 ± 0.5V
10V 5V ± 1V
15V 7.5V ± 1.5V
S1
A
, S1
B
(Pins 5 and 16)
These are voltage signal input pins and, if used, they
should be driven with a source impedance below 5k. The
S1
A
, S1
B
pins can be used to alter the CLK to center
frequency ratio (f
CLK
/f
0
) of the filter (see Modes 1b, 1c, 2a,
2b) or to feedforward the input signal for allpass filter
configurations (see Modes 4 and 5). When these pins are
not used, they should be tied to the AGND pin.
S
A/B
(Pin 6)
When S
A/B
is high, the S2 input of the filter’s voltage
summer (see Block Diagram) is tied to the lowpass output.
This frees the S1 pin to realize various modes of operation
for improved applications flexibility. When the S
A/B
pin is
connected to the negative supply, the S2 input switches to
ground and internally becomes inactive. This improves
the filter noise performance and typically lowers the value
of the offset V
OS2
.
AGND (Pln 15)
This should be connected to the system ground for dual
supply operation. When the LTC1060 operates with a
single positive supply, the analog ground pin should be
tied to 1/2 supply and bypassed with a 0.1µF capacitor, as
shown in the application, “Single 5V, Gain of 1000 4th
Order Bandpass Filter.” The positive inputs of all the
Power Supplies
The V
+
A
and V
+
D
(pins 7 and 8) and the V
A
and V
D
(Pins 14 and 13) are, respectively, the analog and digital
positive and negative supply pins. For most cases, Pins 7
and 8 should be tied together and bypassed by a 0.1µF disc
ceramic capacitor. The same holds for Pins 13 and 14. If
the LTC1060 operates in a high digital noise environment,
the supply pins can be bypassed separately. Pins 7 and 8
are internally connected through the IC substrate and
should be biased from the same DC source. Pins 13 and
14 should also be biased from the same DC source.
The LTC1060 is designed to operate with ±2.5V supply
(or single 5V) and with ±5V to ±8V supplies. The mini-
mum supply, where the filter operates reliably, is ± 2.37V.
With low supply operation, the maximum input clock
frequency is about 500kHz. Beyond this, the device exhib-
its excessive Q enhancement and center frequency errors.
Clock Input Pins and Level Shift
The level shift (LSh) Pin 9 is used to accommodate T
2
L or
CMOS clock levels. With dual supplies equal or higher
to ±4.5V, Pin 9 should be connected to ground (same
potential as the AGND pin). Under these conditions the
clock levels can be T
2
L or CMOS. With single supply
operation, the negative supply pins and the LSh pin should
be tied to the system ground. The AGND, Pin 15, should
be biased at 1/2 supplies, as shown in the “Single 5V Gain
of 1000 4th Order Bandpass Filter” circuit. Again, under
these conditions, the clock levels can be T
2
L or CMOS. The
input clock pins (10,11) share the same level shift pin.
The clock logic threshold level over temperature is
typically 1.5V ± 0.1V above the LSh pin potential. The duty
cycle of the input clock should be close to 50%. For clock
frequencies below 1MHz, the (f
CLK
/f
0
) ratio is independent
from the clock input levels and from its rise and fall times.
Fast rising clock edges, however, improve the filter DC
offsets. For clock frequencies above 1MHz, T
2
L level
clocks are recommended.
50/100/Hold (Pin 12)
By tying Pin 12 to (V
+
A
and V
+
D
), the filter operates in the
50:1 mode. With ±5V supplies, Pin 12 can be typically 1V
below the positive supply without affecting the 50:1
PIN DESCRIPTION AND APPLICATIONS INFORMATIO
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8
LTC1060
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internal op amps, as well as the reference point of all the
internal switches are connected to the AGND pin. Because
of this, a “clean” ground is recommended.
f
CLK
/f
0
Ratio
The f
CLK
/f
0
reference of 100:1 or 50:1 is derived from the
filter center frequency measured in mode 1, with a Q = 10
and V
S
= ±5V. The clock frequencies are, respectively,
500kHz/250kHz for the 100:1/150:1 measurement. All the
curves shown in the Typical Performance Characteristics
section are normalized to the above references.
Graphs 1 and 2 in the Typical Performance Characteristics
show the (f
CLK
/f
0
) variation versus values of ideal Q. The
LTC1060 is a sampled data filter and it only approximates
continuous time filters. In this data sheet, the LTC1060 is
treated in the frequency domain because this approxima-
tion is good enough for most filter applications. The
LTC1060 deviates from its ideal continuous filter model
when the (f
CLK
/f
0
) ratio decreases and when the Q’s are
low. Since low Q filters are not selective, the frequency
domain approximation is well justified. In Graph 15 the
LTC1060 is connected in mode 3 and its ( f
CLK
/f
0
) ratio is
adjusted to 200:1 and 500:1. Under these conditions, the
filter is over-sampled and the (f
CLK
/f
0
) curves are nearly
independent of the Q values. In mode 3, the ( f
CLK
/f
0
) ratio
typically deviates from the tested one in mode 1 by ±0.1%.
f
0
x Q Product Ratio
This is a figure of merit of general purpose active filter
building blocks. The f
0
x Q product of the LTC1060
depends on the clock frequency, the power supply volt-
ages, the junction temperature and the mode of operation.
At 25°C ambient temperature for ±5V supplies, and
for clock frequencies below 1MHz, in mode 1 and its
derivatives, the f
0
x Q product is mainly limited by the
desired f
0
and Q accuracy. For instance,from
Graph 4 at 50:1 and for f
CLK
below 800kHz, a predictable
ideal Q of 400 can be obtained. Under this condition, a
respectable f
0
x Q product of 6.4MHz is achieved. The
16kHz center frequency will be about 0.22% off from the
tested value at 250kHz clock (see Graph 1). For the same
clock frequency of 800kHz and for the same Q value of
400, the f
0
x Q product can be further increased if the
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clock-to-center frequency is lowered below 50:1. In mode
1c with R6 = 0 and R6 = , the (f
CLK
/f
0
) ratio is 50/2. The
f
0
x Q product can now be increased to 9MHz since, with
the same clock frequency and same Q value, the filter can
handle a center frequency of 16kHz x 2.
For clock frequencies above 1MHz, the f
0
x Q product is
limited by the clock frequency itself. From Graph 4 at
±7.5V supply, 50:1 and 1.4MHz clock, a Q of 5 has about
8% error; the measured 28kHz center frequency was
skewed by 0.8% with respect to the guaranteed value at
250kHz clock. Under these conditions, the f
0
x Q product
is only 140kHz but the filter can handle higher input signal
frequencies than the 800kHz clock frequency, very high Q
case described above.
Mode 3, Figure 11, and the modes of operation where R4
is finite, are “slower” than the basic mode 1. This is shown
in Graph 16 and 17. The resistor R4 places the input op
amp inside the resonant loop. The finite GBW of this op
amp creates an additional phase shift and enhances the Q
value at high clock frequencies. Graph 16 was drawn with
a small capacitor, C
C
, placed across R4 and as such, at V
S
= ±5V, the (1/2πR4C
C
) = 2MHz. With V
S
= ±2.5V the (1/
2πR4C
C
) should be equal to 1.4MHz. This allows the Q
curve to be slightly “flatter” over a wider range of clock
frequencies. If, at ±5V supply, the clock is below 900kHz
(or 400kHz for V
S
= ±2.5V), this capacitor, C
C
, is not needed.
For Graph 25, the clock-to-center frequency ratios are
altered to 70.7:1 and 35.35:1. This is done by using mode
1c with R5 = 0, Figure 7, or mode 2 with R2 = R4 = 10k.
The mode 1c, where the input op amp is outside the main
loop, is much faster. Mode 2, however, is more versatile.
At 50:1, and for T
A
= 25°C the mode 1c can be tuned for
center frequencies up to 30kHz.
Output Noise
The wideband RMS noise of the LTC1060 outputs is nearly
independent from the clock frequency, provided that the
clock itself does not become part of the noise. The LTC1060
noise slightly decreases with ±2.5V supply. The noise at
the BP and LP outputs increases for high Q’s. Table 2
shows typical values of wideband RMS noise. The num-
bers in parentheses are the noise measurement in mode 1
with the S
A/B
pin shorted to V
as shown in Figure 25.
9
LTC1060
1060fb
Table 2. Wideband RMS Noise
f
CLK
NOTCH/HP BP LP
V
S
f
0
(µV
RMS
)(µV
RMS
)(µV
RMS
) CONDITIONS
±5V 50:1 49 (42) 52 (43) 75 (65) Mode1, R1 = R2 = R3
±5V 100:1 70 (55) 80 (58) 90 (88) Q = 1
±2.5V 50:1 33 (31) 36 (32) 48 (43)
±2.5V 100:1 48 (40) 52 (40) 66 (55)
±5V 50:1 20 (18) 150 (125) 186 (155) Mode 1, Q = 10
±5V 100:1 25 (21) 220 (160) 240 (180) R1 = R3 for BP out
±2.5V 50:1 16 (15) 100 (80) 106 (87) R1 = R2 for LP out
±2.5V 100.1 20 (17) 150 (105) 150 (119)
±5V 50:1 57 57 62 Mode 3, R1 = R2 = R3 = R4
±5V 100:1 72 72 80 Q = 1
±2.5V 50:1 40 40 42
±2.5V 100.1 50 50 53
±5V 50:1 135 120 140 Mode 3, R2 = R4, Q = 10
±5V 100:1 170 160 185 R3 = R1 for BP out
±2.5V 50:1 100 88 100 R4 = R1 for LP and HP out
±2.5V 100:1 125 115 130
Short-Circuit Currents
Short circuits to ground, positive or negative power supply
are allowed as long as the power supplies do not exceed
±5V and the ambient temperature stays below 85˚C.
Above ±5V and at elevated temperatures, continuous
short circuits to the negative power supply will cause
excessive currents to flow. Under these conditions, the
device will get damaged if the short-circuit current is
allowed to exceed 80mA.
Each building block of the LTC1060, together with an
external clock and a few resistors, closely approximates
2nd order filter functions. These are tabulated below in the
frequency domain.
1. Bandpass function: available at the bandpass output
Pins 2 (19). (Figure 1.)
G(s) = H
OBP
sω
o
/Q
s
2
+ (sω
o
/Q) + ω
o
2
H
OBP
= Gain at ω = ω
o
f
0
= ω/2π; f
0
is the center frequency of the complex
pole pair. At this frequency, the phase shift
between input and output is –180˚.
Q = Quality factor of the complex pole pair. It is the
ratio of f
0
to the –3dB bandwidth of the 2nd or-
der bandpass function. The Q is always mea-
sured at the filter BP output.
2. Lowpass function: available at the LP output Pins
1 (20). (Figure 2.)
G(s) = H
OLP
ω
o
s
2
+ s(ω
o
/Q) + ω
o
2
2
H
OLP
DC gain of the LP output.
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DEFINITION OF FILTER FUNCTIONS
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LTC1060CSW#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Active Filter Dual Switched Capacitor Filter
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