74F573SC

© 2000 Fairchild Semiconductor Corporation DS009566 www.fairchildsemi.com
April 1988
Revised October 2000
74F573 Octal D-Type Latch with 3-STATE Outputs
74F573
Octal D-Type Latch with 3-STATE Outputs
General Description
The 74F573 is a high speed octal latch with buffered com-
mon Latch Enable (LE) and buffered common Output
Enable (OE
) inputs.
This device is functionally identical to the 74F373 but has
different pinouts.
Features
Inputs and outputs on opposite sides of package
allowing easy interface with microprocessors
Useful as input or output port for microprocessors
Functionally identical to 74F373
3-STATE outputs for bus interfacing
Guaranteed 4000V minimum ESD protection
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number Package Number Package Description
74F573SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F573SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F573PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
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74F573
Unit Loading/Fan Out
Functional Description
The 74F573 contains eight D-type latches with 3-state out-
put buffers. When the Latch Enable (LE) input is HIGH,
data on the D
n
inputs enters the latches. In this condition
the latches are transparent, i.e., a latch output will change
state each time its D input changes. When LE is LOW the
latches store the information that was present on the D
inputs a setup time preceding the HIGH-to-LOW transition
of LE. The 3-state buffers are controlled by the Output
Enable (OE
) input. When OE is LOW, the buffers are in the
bi-state mode. When OE
is HIGH the buffers are in the high
impedance mode but this does not interfere with entering
new data into the latches.
Function Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
O
0
= Value stored from previous clock cycle
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names Description
U.L.
Input I
IH
/I
IL
HIGH/LOW
Output I
OH
/I
OL
D
0
D
7
Data Inputs 1.0/1.0 20 µA/0.6 mA
LE Latch Enable Input (Active HIGH) 1.0/1.0 20
µA/0.6 mA
OE
3-STATE Output Enable Input (Active LOW) 1.0/1.0 20 µA/0.6 mA
O
0
O
7
3-STATE Latch Outputs 150/40(33.3) 3 mA/24 mA (20 mA)
Inputs Outputs
OE
LE D O
LHHH
LHLL
LLXO
0
HXXZ
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74F573
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Storage Temperature 65°C to +150°C
Ambient Temperature under Bias
55°C to +125°C
Junction Temperature under Bias
55°C to +150°C
V
CC
Pin Potential to Ground Pin 0.5V to +7.0V
Input Voltage (Note 2)
0.5V to +7.0V
Input Current (Note 2)
30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
= 0V)
Standard Output
0.5V to V
CC
3-STATE Output 0.5V to +5.5V
Current Applied to Output
in LOW State (Max) twice the rated I
OL
(mA)
ESD Last Passing Voltage (Min) 4000V
Free Air Ambient Temperature 0
°C to +70°C
Supply Voltage
+4.5V to +5.5V
Symbol Parameter Min Typ Max Units
V
CC
Conditions
V
IH
Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage 1.2 V Min I
IN
= 18 mA
V
OH
Output HIGH 10% V
CC
2.5
VMin
I
OH
= 1 mA
Voltage 10% V
CC
2.4 I
OH
= 3 mA
5% V
CC
2.7 I
OH
= 1 mA
5% V
CC
2.7 I
OH
= 3 mA
V
OL
Output LOW 10% V
CC
0.5 V Min I
OL
= 24 mA
Voltage
I
IH
Input HIGH 20.0
µAMaxV
IN
= 2.7V
Current 5.0
I
BVI
Input HIGH Current
7.0 µAMaxV
IN
= 7.0V
Breakdown Test
I
CEX
Output HIGH
50 µAMaxV
OUT
= V
CC
Leakage Current
V
ID
Input Leakage
4.75 V 0.0
I
ID
= 1.9 µA
Tes t All Other Pins Grounded
I
OD
Output Leakage
3.75 µA0.0
V
IOD
= 150 mV
Circuit Current All Other Pins Grounded
I
IL
Input LOW Current 0.6 mA Max V
IN
= 0.5V
I
OZH
Output Leakage Current 50 µAMaxV
OUT
= 2.7V
I
OZL
Output Leakage Current 50 µAMaxV
OUT
= 0.5V
I
OS
Output Short-Circuit Current 60 150 mA Max V
OUT
= 0V
I
ZZ
Bus Drainage Test 500 µA0.0VV
OUT
= 5.25V
I
CCL
Power Supply Current 35 55 mA Max V
O
= LOW
I
CCZ
Power Supply Current 35 55 mA Max V
O
= HIGH Z

74F573SC

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Latches Octal D-Type Latch
Lifecycle:
New from this manufacturer.
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