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LTC4313IMS8-1#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
LTC4313-1/LTC4313-2/
LTC4313-3
1
4313123f
Typical applicaTion
FeaTures DescripTion
2-Wire Bus Buffers with
High Noise Margin
The LTC
®
4313 is a hot swappable 2-wire bus buffer
that provides bidirectional buffering while maintain-
ing a low offset voltage and high noise margin up to
0.3 • V
CC
. The high noise margin allows the LTC4313 to be
interoperable with devices that drive a high V
OL
(>0.4V) and
allows multiple LTC4313s to be cascaded. The LTC4313-1
and LTC4313-2 support level translation between 3.3V and
5V busses. In addition to these voltages, the LTC4313-3
also supports level translation to 1.5V, 1.8V and 2.5V.
During insertion, the SDA and SCL lines are pre-charged to
1V to minimize bus disturbances. Connection is established
between the input and output after ENABLE is asserted
high and a stop bit or bus idle condition has been detected
on the SDA and SCL pins.
If both data and clock are not simultaneously high at least
once in 45ms, the input is disconnected from the output.
Up to 16 clock pulses are subsequently generated to free
the stuck bus. Rise time accelerators (RTAs) provide pull-up
currents on SDA and SCL rising edges to meet rise time
specifications in heavily loaded systems. The RTAs are
configured as slew limited switches in the LTC4313-1 and
2.5mA current sources in the LTC4313-2. The LTC4313-3
does not have RTAs.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6356140, 6650174,
7032051, 7478286.
400kHz Operation
applicaTions
n
Bidirectional Buffer Increases Fanout
n
High Noise Margin with V
IL
= 0.3 • V
CC
n
Compatible with Non-Compliant I
2
C Devices That
Drive a High V
OL
n
Strong (LTC4313-1) and 2.5mA (LTC4313-2)
Rise Time Accelerator Current
n
Level Shift 1.5V, 1.8V, 2.5V, 3.3V and 5V Busses
n
Prevents SDA and SCL Corruption During Live Board
Insertion and Removal from Backplane
n
Stuck Bus Disconnect and Recovery
n
Compatible with I
2
C, I
2
C Fast Mode and SMBus
n
±4kV Human Body Model ESD Ruggedness
n
High Impedance SDA, SCL Pins When Unpowered
n
8-Lead MSOP and 8-Lead (3mm × 3mm) DFN
Packages
n
Capacitance Buffers/Bus Extender
n
Live Board Insertion
n
Telecommunications Systems Including ATCA
n
Level Translation
n
PMBus
n
Servers
LTC4313-1
GND
V
CC
4313123 TA01a
READY
SCLOUT
SDAOUT
ENABLE
SCLIN
SDAIN
SCL1
SDA1
2.7k2.7k
0.01µF
3.3V
READY
SCL2
SDA2
1.3k10k
5V
1.3k
1V/DIV
500ns/DIV
4313123 TA01b
R
BUS_IN
= 2.7kΩ, C
BUS_IN
= 50pF
R
BUS_OUT
= 1.3kΩ, C
BUS_OUT
= 100pF
SCLOUT
SCLIN
LTC4313-1/LTC4313-2/
LTC4313-3
2
4313123f
pin conFiguraTion
absoluTe MaxiMuM raTings
Supply Voltage V
CC
...................................... –0.3V to 6V
Input Voltage ENABLE .................................. –0.3V to 6V
Input/Output Voltages SDAIN, SDAOUT,
SCLIN, SCLOUT ........................................... –0.3V to 6V
Output Voltage READY ................................. –0.3V to 6V
Output Sink Current READY ...................................50mA
(Notes 1, 2)
TOP VIEW
DD8 PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
5
6
7
8
9
4
3
2
1ENABLE
SCLOUT
SCLIN
GND
V
CC
SDAOUT
SDAIN
READY
T
JMAX
= 150°C, θ
JA
= 39.7°C/W
EXPOSED PAD (PIN 9) PCB CONNECTION TO GND IS OPTIONAL
1
2
3
4
ENABLE
SCLOUT
SCLIN
GND
8
7
6
5
V
CC
SDAOUT
SDAIN
READY
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 150°C, θ
JA
= 163°C/W
orDer inForMaTion
Operating Ambient Temperature Range
LTC4313C ................................................ 0°C to 70°C
LTC4313I.............................................. –40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MS Package ...................................................... 300°C
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4313CDD-1#PBF LTC4313CDD-1#TRPBF LFYZ 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C
LTC4313IDD-1#PBF LTC4313IDD-1#TRPBF LFYZ 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LTC4313CMS8-1#PBF LTC4313CMS8-1#TRPBF LTFYZ 8-Lead Plastic MSOP 0°C to 70°C
LTC4313IMS8-1#PBF LTC4313IMS8-1#TRPBF LTFYZ 8-Lead Plastic MSOP –40°C to 85°C
LTC4313CDD-2#PBF LTC4313CDD-2#TRPBF LFZB 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C
LTC4313IDD-2#PBF LTC4313IDD-2#TRPBF LFZB 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LTC4313CMS8-2#PBF LTC4313CMS8-2#TRPBF LTFZC 8-Lead Plastic MSOP 0°C to 70°C
LTC4313IMS8-2#PBF LTC4313IMS8-2#TRPBF LTFZC 8-Lead Plastic MSOP –40°C to 85°C
LTC4313CDD-3#PBF LTC4313CDD-3#TRPBF LGDD 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C
LTC4313IDD-3#PBF LTC4313IDD-3#TRPBF LGDD 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LTC4313CMS8-3#PBF LTC4313CMS8-3#TRPBF LTGDF 8-Lead Plastic MSOP 0°C to 70°C
LTC4313IMS8-3#PBF LTC4313IMS8-3#TRPBF LTGDF 8-Lead Plastic MSOP –40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
LTC4313-1/LTC4313-2/
LTC4313-3
3
4313123f
elecTrical characTerisTics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Power Supply/Start-Up
V
CC
Input Supply Voltage
l
2.9 5.5 V
V
DD,BUS
2-Wire Bus Supply Voltage LTC4313-1, LTC4313-2
l
2.9 5.5 V
LTC4313-3
l
1.4 5.5 V
I
CC
Input Supply Current V
ENABLE
= V
CC
= 5.5V, V
SDAIN,SCLIN
= 0V
(Note 3)
l
6 8.1 10 mA
I
CC(DISABLED)
Input Supply Current V
ENABLE
= 0V, V
CC
= 5.5V,
V
SDAIN,SCLIN
= 0V
l
2.5 3.5 4.5 mA
V
TH_UVLO
V
CC
UVLO Threshold V
CC
Rising
l
2.55 2.7 2.85 V
V
CC_UVLO(HYST)
UVLO Threshold Hysteresis Voltage 200 mV
V
PRE
Precharge Voltage SDA, SCL Pins Open
l
0.8 1 1.2 V
Buffers
V
OS(SAT)
Buffer Offset Voltage I
OL
= 4mA, Driven V
SDA,SCL
= 50mV
l
100 190 280 mV
I
OL
= 500µA, Driven V
SDA,SCL
= 50mV
l
15 60 120 mV
V
OS
Buffer Offset Voltage I
OL
= 4mA, Driven V
SDA,SCL
= 200mV
l
50 120 180 mV
I
OL
= 500µA, Driven V
SDA,SCL
= 200mV
l
15 60 115 mV
V
IL, FALLING
Buffer Input Logic Low Voltage V
CC
= 2.9V, 3.3V, 5.5V
l
0.3•V
CC
0.33•V
CC
0.36•V
CC
V
∆V
IL(HYST)
V
IL
Hysteresis Voltage 50 mV
I
LEAK
Input Leakage Current SDA, SCL Pins = 5.5V, V
CC
= 5.5V, 0V
l
±10 µA
C
IN
Input Capacitance SDA, SCL Pins (Note 4)
l
10 pF
Rise Time Accelerators (LTC4313-1 and LTC4313-2 Only)
dV/dt
(RTA)
Minimum Slew Rate Requirement SDA, SCL Pins, V
CC
= 5V
l
0.1 0.2 0.4 V/µs
V
RTA(TH)
Rise Time Accelerator DC Threshold Voltage V
CC
= 5V
l
0.38 •V
CC
0.41•V
CC
0.44•V
CC
V
∆V
ACC
Buffers Off to Accelerator On Voltage SDA, SCL Pins, V
CC
= 5V
l
0.05•V
CC
0.07•V
CC
mV
I
RTA
Rise Time Accelerator Pull-Up Current SDA, SCL Pins, V
CC
= 5V (Note 5)
LTC4313-1
l
15
25
40
mA
LTC4313-2
l
1.5 2.5 3.5 mA
Enable/Control
V
EN(TH)
ENABLE Threshold Voltage
l
1 1.4 1.8 V
I
LEAK
ENABLE Leakage Current V
ENABLE
= 5.5V
l
0.1 ±10 µA
V
READY(OL)
READY Output Low Voltage I
READY
= 3mA, V
CC
= 5V
l
0.4 V
I
READY(OH)
READY Off Leakage Current V
CC
= V
READY
= 5V
l
0.1 ±5 µA
Stuck Low Timeout Circuitry
t
TIMEOUT
Bus Stuck Low Timer
l
35 45 55 ms
I
2
C Interface Timing
f
SCL(MAX)
I
2
C Frequency Max
l
400 kHz
t
PDHL
SCL, SDA Fall Delay V
CC
= V
DD,BUS
= 5V, C
BUS
= 100pF,
R
BUS
= 10kΩ (Note 4)
130 250 ns
t
f
SCL, SDA Fall Times V
CC
= V
DD,BUS
= 5V, C
BUS
= 100pF,
R
BUS
= 10kΩ (Note 4)
20 300 ns
t
IDLE
Bus Idle Time
l
55 95 175 µs
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 3.3V unless otherwise noted.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive and all voltages are referenced to
GND unless otherwise indicated.
Note 3: Test performed with SDA, SCL buffers active.
Note 4: Guaranteed by design and not tested.
Note 5: Measured in a special DC mode with V
SDA,SCL
= V
RTA(TH)
+ 1V.
The transient I
RTA
during rising edges for the LTC4313-1 will depend on
the bus loading condition and the slew rate of the bus. The LTC4313-1’s
internal slew rate control circuitry limits the maximum bus rise rate to
75V/µs by controlling the transient I
RTA
.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

LTC4313IMS8-1#PBF

Mfr. #:
Buy LTC4313IMS8-1#PBF
Manufacturer:
Analog Devices Inc.
Description:
Interface - Signal Buffers, Repeaters 2-Wire Bus Bufs w/ Hi N Margin
Lifecycle:
New from this manufacturer.
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