© 2000 Fairchild Semiconductor Corporation DS010234 www.fairchildsemi.com
July 1989
Revised October 2000
74ACQ240 • 74ACTQ240 Quiet Series
Octal Buffer/Line Driver with 3-STATE Outputs
74ACQ240 • 74ACTQ240
Quiet Series
Octal Buffer/Line Driver
with 3-STATE Outputs
General Description
The ACQ/ACTQ240 is an inverting octal buffer and line
driver designed to be employed as a memory address
driver, clock driver and bus oriented transmitter or receiver
which provides improved PC board density. The ACQ/
ACTQ utilizes Fairchild’s Quiet Series
technology to
guarantee quiet output switching and improve dynamic
threshold performance. FACT Quiet Series
features
GTO
output control and undershoot corrector in addition
to a split ground bus for superior performance.
Features
■ I
CC
and I
OZ
reduced by 50%
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
■ Guaranteed pin-to-pin skew AC performance
■ Improved latch-up immunity
■ Inverting 3-STATE outputs drive bus lines or buffer
memory address registers
■ Outputs source/sink 24 mA
■ Faster prop delays than the standard ACT240
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram Pin Descriptions
FACT, Quiet Series, FACT Quiet Series, and GTO are trademarks of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ACQ240SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACQ240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACQ240PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74ACTQ240SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACTQ240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACTQ240QSC MQA20 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
74ACTQ240PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
OE
1
, OE
2
3-STATE Output Enable Inputs
I
0
–I
7
Inputs
O
0
–O
7
Outputs