LTC4440AMPMS8E-5#TRPBF

LTC4440A-5
7
4440a5f
For more information www.linear.com/LTC4440A-5
applicaTions inForMaTion
Figure 1. Capacitance Seen by TG During Switching
Overview
The LTC4440A-5 receives a ground-referenced, low voltage
digital input signal to drive a high side N-channel power
MOSFET whose drain can float up to 80V above ground,
eliminating the need for a transformer between the low
voltage control signal and the high side gate driver. The
LTC4440A-5 normally operates in applications with input
supply voltages (V
IN
) up to 80V, but is able to withstand
and continue to function during 100V, 100ms transients
on the input supply.
The powerful output driver of the LTC4440A-5 reduces the
switching losses of the power MOSFET, which increase
with transition time. The LTC4440A-5 is capable of driv
-
ing a 1nF load with 10ns rise and 7ns fall times using a
bootstrapped supply voltage V
BOOST–TS
of 6V.
Input Stage
The LTC4440A-5 employs TTL/CMOS compatible input
logic level or thresholds that allow a low voltage digital
signal to drive standard threshold power MOSFETs. The
LTC4440A-5 contains an internal voltage regulator that
biases the input buffer, allowing the input thresholds
(V
IH
= 1.6V, V
IL
= 1.25V) to be relatively independent of
variations in V
CC
. The 350mV hysteresis between V
IH
and
V
IL
eliminates false triggering due to noise during switching
transitions. However, care should be taken to keep this pin
from any noise pickup, especially in high frequency, high
voltage applications. The LTC4440A-5 input buffer has a
high input impedance and draws negligible input current,
simplifying the drive circuitry required for the input.
Output Stage
A simplified version of the LTC4440A-5’s output stage is
shown in Figure 1. The pull-down device is an N-channel
MOSFET (N1) and the pull-up device is an NPN bipolar
junction transistor (Q1). The output swings from the lower
rail (TS) to within an NPN V
BE
(~0.7V) of the positive rail
(BOOST). This large voltage swing is important in driv-
ing external power MOSFETs, whose R
DS(ON)
is inversely
proportional to its gate overdrive voltage (V
GS
– V
TH
).
The LTC4440A-5’s peak pull-up (Q1) current is 1.1A while
the pull-down (N1) resistance is 1.85Ω, with a BOOST-
TS supply of 6V. The low impedance of N1 is required to
discharge the power MOSFETs gate capacitance during
high-to-low signal transitions. When the power MOSFETs
gate is pulled low (gate shorted to source through N1) by
the LTC4440A-5, its source (TS) is pulled low by its load
(e.g., an inductor or resistor). The slew rate of the source/
gate voltage causes current to flow back to the MOSFETs
gate through the gate-to-drain capacitance (C
GD
). If the
MOSFET driver does not have sufficient sink current ca-
pability (low output impedance), the current through the
power
MOSFET
s C
GD
can momentarily pull the gate high,
turning the MOSFET back on.
A similar scenario exists when the LTC4440A-5 is used
to drive a low side MOSFET. When the low side power
MOSFETs gate is pulled low by the LTC4440A-5, its drain
voltage is pulled high by its load (e.g., inductor or resis
-
tor). The slew rate of the drain voltage causes current to
flow back to the MOSFETs gate through its gate-to-drain
capacitance. If the MOSFET driver does not have sufficient
sink current capability (low output impedance), the current
through the power MOSFETs C
GD
can momentarily pull
the gate high, turning the MOSFET back on.
Rise/Fall Time
Since the power MOSFET generally accounts for the ma
-
jority of the power loss in a converter, it is important to
quickly turn it on or off, thereby minimizing the transition
time in
its linear region. The LTC4440A-5 can drive a 1nF
load with a 10ns rise time and 7ns fall time.
The LTC4440A-5’s rise and fall times are determined by
the peak current capabilities of Q1 and N1. The predriver
that drives Q1 and N1 uses a nonoverlapping transition
scheme to minimize cross-conduction currents. N1 is fully
turned off before Q1 is turned on and vice versa.
BOOST
V
IN
UP TO 100V
TS
V
TG
C
GD
POWER
MOSFET
LOAD
INDUCTOR
C
GS
4440A5 F01
LTC4440A-5
Q1
N1
LTC4440A-5
8
4440a5f
For more information www.linear.com/LTC4440A-5
applicaTions inForMaTion
Power Dissipation
To ensure proper operation and long-term reliability,
the LTC4440A-5 must not operate beyond its maximum
temperature rating. Package junction temperature can be
calculated by:
T
J
= T
A
+ PD (θ
JA
)
where:
T
J
= Junction Temperature
T
A
= Ambient Temperature
PD = Power Dissipation
θ
JA
= Junction-to-Ambient Thermal Resistance
Power dissipation consists of standby and switching
power losses:
PD = P
STDBY
+ P
AC
where:
P
STDBY
= Standby Power Losses
P
AC
= AC Switching Losses
The LTC4440A-5 consumes very little current during
standby. The DC power loss at V
CC
= 6V and V
BOOST–TS
=
6V is only (200µA)(6V) = 1.2mW with INP = 0V.
AC switching losses are made up of the output capacitive
load losses and the transition state losses. The capacitive
load losses are primarily due to the large AC currents
needed to charge and discharge the load capacitance dur
-
ing switching. Load losses for the output driver driving a
pure capacitive load C
OUT
would be:
Load Capacitive Power = (C
OUT
)(f)(V
BOOST–TS
)
2
The power MOSFETs gate capacitance seen by the driver
output varies with its V
GS
voltage level during switching.
A power MOSFETs capacitive load power dissipation can
be calculated using its gate charge, Q
G
. The Q
G
value
corresponding to the MOSFETs V
GS
value (V
CC
in this
case) can be readily obtained from the manufacturers
Q
G
vs V
GS
curves:
Load Capacitive Power (MOS) = (V
BOOST–TS
)(Q
G
)(f)
Transition state power losses are due to both AC currents
required to charge and discharge the drivers internal
nodal capacitances and cross-conduction currents in the
internal gates.
Undervoltage Lockout (UVLO)
The LTC4440A-5 contains an undervoltage lockout detec
-
tor that monitors V
CC
. When V
CC
falls below 3.04V, the
internal buffer is disabled and the output pin TG is pulled
down to TS.
Bypassing and Grounding
The LTC4440A-5 requires proper bypassing on the V
CC
and V
BOOST–TS
supplies due to its high speed switching
(nanoseconds) and large AC currents (Amperes). Careless
component placement and PCB trace routing may cause
excessive ringing and under/overshoot.
To obtain the optimum performance from the LTC4440A-5:
A. Mount the bypass capacitors as close as possible
between the V
CC
and GND pins and the BOOST and
TS pins. The leads should be shortened as much as
possible to reduce lead inductance.
B. Use a low inductance, low impedance ground plane
to reduce any ground drop and stray capacitance.
Remember that the LTC4440A-5 switches >2A peak
currents and any significant ground drop will degrade
signal integrity.
C. Plan the power/ground routing carefully. Know where
the large load switching current is coming from and
going to. Maintain separate ground return paths for
the input pin and the output power stage.
D. Keep the copper trace between the driver output pin
and the load short and wide.
E. When using the MS8E package, be sure to solder the
exposed pad on the back side of the LTC4440A-5 pack
-
age to the board. Correctly soldered to a 2500mm
2
double-sided 1oz copper board, the LTC4440A-5 has
a thermal resistance of approximately 40°C/W. Failure
to make good thermal contact between the exposed
back side and the copper board will result in thermal
resistances far greater than 40°C/W.
LTC4440A-5
9
4440a5f
For more information www.linear.com/LTC4440A-5
Typical applicaTions
18
10
911
12V
V
IN
12
LTC3722EGN-1
PDLY
OUTF
OUTE
COMPSSPGNDGND
CS
V
IN
SBUS
UVLO
1µF
ADLY
330pF
MMBT3904
2.2nF
100k
D12
5.1V
T3
1(1.5mH):0.5
T1
5(105µH):1:1
T2
5:5(105µH):1:1
2.49k
9.53k
10k
2.7k
470Ω
1/4W
L4
1mH
C3
68µF
20V
V
H
16
15
8
1 9
5
4
150Ω
0.02Ω
1.5W
30.1k
220pF
100Ω
330Ω
1.10k
909Ω
4.87k
1/4W
4.87k
1/4W
51Ω
2W
220pF
182k
20k
1/4W
220pF
4.99k
20k
180pF
68nF
220pF0.47µF
150k
SYNC PV
CC
CSE
+
LTC3901EGN
CSE
8
6 5
1
4 10 13 7
1µF
1µF
4440A5 TA03
–V
OUT
V
OUT
–V
OUT
D10
10V
V
OUT
ME ME2
GND PGND GND2 PGND2 TIMER
V
CC
330pF
2 3
1.10k 909Ω
39.2k
100Ω
1k
CSF
+
–V
OUT
V
OUT
V
OUT
–V
OUT
V
OUT
12V/35A
–V
OUT
CSF
11 12
MF MF2
14 15 16
22nF
Si7852DP
×4
Si7852DP
×4
Si7852DP
×2
L1
1.3µH
114
2
12V
D7
D8
4
2
1
6
10
8
7
+
1
0.22µF
Si7852DP
×2
3
6
7
824
A
D2
LTC4440A-5
BOOSTINP
TG
TSGNDGND
V
CC
12V
1
0.22µF
Si7852DP
×2
3
6
7
8
12VD
24
C
D3
D4
D5
51Ω
2W
0.47µF
100V
LTC4440A-5
BOOSTINP
TG
TSGNDGND
V
CC
12V
1µF
100V
×4
V
IN
V
IN
–V
IN
36V TO 60V
1µF
100V
17
D
OUTD
19
10Ω
10Ω
C
OUTC
20
B
OUTB
21
A
OUTA
C1, C2
180µF
16V
×2
+
1µF
0.47µF, 100V TDK C3216X7R2A474M
1µF, 100V TDK C4532X7R2A105M
C1, C2: SANYO 16SP180M
C3: AVX TPSE686M020R0150
C4: MURATA DE2E3KH222MB3B
D1, D4-D6: MURS120T3
D2, D3, D7, D8: BAS21
D9: MMBZ5226B
D10: MMBZ5240B
D11: BAT54
D12: MMBZ231B
L1: SUMIDA CDEP105-1R3MC-50
L2: PULSE PA0651
L3: PA1294.910
L4: COILCRAFT DO1608C-105
Q1, Q2: ZETEX FMMT619
Q3, Q4: ZETEX FMMT718
T1, T2: PULSE PA0526
T3: PULSE PA0785
6
3
422236
33k
5 7
D11
8.25k
I
SNS
5V
REF
I
SNS
0.1µF
5 8
1
2
1
MOC207
C4
2.2nF
250V
0.047µF
3
6
5
8
GND-F
V
+
GND-S
COLL REF
LT1431CS8
1.1k
22Ω
200k
750Ω
100Ω
D9 3.3V
0.02Ω
1.5W
V
H
D1
D6
13k
1/2W
0.47µF
100V
820pF
200V
L3
0.85µH
15Ω
1W
0.47µF
100V
Si7852DP
×2
12VB
Q1
Q3
Q2
Q4
11
10
8
7
MMBT3904
FBSPRG
R
LEB
10k
13
SYNC
5.1k
1
NC
8
DPRG
2
V
REF
5V
REF
14
C
T
24
L2
150nH
LTC3722/LTC4440A-5 420W 36V-60V
IN
to 12V/35A Isolated Full-Bridge Supply

LTC4440AMPMS8E-5#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Gate Drivers High & Low-Side Driver
Lifecycle:
New from this manufacturer.
Delivery:
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