MC74HC574ADWG

MC74HC574A
http://onsemi.com
4
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF; Input t
r
= t
f
= 6.0 ns)
V
CC
V
Guaranteed Limit
Symbol Parameter
−55 to 25_C 85_C 125_C
Unit
f
max
Maximum Clock Frequency (50% Duty Cycle)
(Figures 2 and 5)
2.0
3.0
4.5
6.0
6.0
15
30
35
4.8
10
24
28
4.0
8.0
20
24
MHz
t
PLH
,
t
PHL
Maximum Propagation Delay, Clock to Q
(Figures 2 and 5)
2.0
3.0
4.5
6.0
160
105
32
27
200
145
40
34
240
190
48
41
ns
t
PLZ
,
t
PHZ
Maximum Propagation Delay, Output Enable to Q
(Figures 3 and 6)
2.0
3.0
4.5
6.0
150
100
30
26
190
125
38
33
225
150
45
38
ns
t
PZL
,
t
PZH
Maximum Propagation Delay, Output Enable to Q
(Figures 3 and 6)
2.0
3.0
4.5
6 0
140
90
28
24
175
120
35
30
210
140
42
36
ns
t
TLH
,
t
THL
Maximum Output Transition Time, any Output
(Figures 2 and 5)
2.0
3.0
4.5
6.0
60
27
12
10
75
32
15
13
90
36
18
15
ns
C
in
Maximum Input Capacitance 10 10 10 pF
C
out
Maximum Three−State Output Capacitance, Output in High−Impedance
State
15 15 15 pF
Typical @ 25°C, V
CC
= 5.0 V
C
PD
Power Dissipation Capacitance (Per Enabled Output)* 24 pF
*Used to determine the no−load dynamic power consumption: P
D
= C
PD
V
CC
2
f + I
CC
V
CC
.
TIMING REQUIREMENTS (C
L
= 50 pF; Input t
r
= t
f
= 6.0 ns)
Guaranteed Limit
V
CC
–55 to 25_C 85_C 125_C
Symbol Parameter Figure Volts Min Max Min Max Min Max Unit
t
su
Minimum Setup Time, Data to Clock 4 2.0
3.0
4.6
6.0
50
40
10
9.0
65
50
13
11
75
60
15
13
ns
t
h
Minimum Hold Time, Clock to Data 4 2.0
3.0
4.5
6.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
ns
t
w
Minimum Pulse Width, Clock 2 2.0
3.0
4.5
6.0
75
60
15
13
95
80
19
16
110
90
22
19
ns
t
r
, t
f
Maximum Input Rise and Fall Times 2 2.0
3.0
4.5
6.0
1000
800
500
400
1000
800
500
400
1000
800
500
400
ns
MC74HC574A
http://onsemi.com
5
Figure 2. Figure 3.
CLOCK
Q
t
r
t
f
V
CC
GND
90%
50%
10%
90%
50%
10%
t
PLH
t
PHL
t
TLH
t
THL
t
w
1/f
max
Q
Q
V
M
V
M
90%
10%
t
PZL
t
PLZ
t
PZH
t
PHZ
V
CC
GND
HIGH
IMPEDANCE
V
OL
V
OH
OUTPUT
ENABLE
SWITCHING WAVEFORMS
Figure 4. Figure 5.
Figure 6. Test Circuit
Figure 7. Expanded Logic Diagram
50%CLOCK
V
CC
VALID
GND
V
CC
GND
t
su
t
h
50%DATA
*Includes all probe and jig capacitance.
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
*Includes all probe and jig capacitance.
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
CONNECT TO V
CC
WHEN
TESTING t
PLZ
AND t
PZL
.
CONNECT TO GND WHEN
TESTING t
PHZ
AND t
PZH
.
1 kW
C
D
Q
2
D0
19
Q0
C
D
Q
3
D1
18
Q1
C
D
Q
4
D2
17
Q2
C
D
Q
5
D3
16
Q3
C
D
Q
6
D4
15
Q4
C
D
Q
7
D5
14
Q5
C
D
Q
8
D6
13
Q6
C
D
Q
9
D7
12
Q7
11
CLOCK
1
OUTPUT ENABLE
MC74HC574A: V
M
= V
OH
x 0.5
MC74HCT574A: V
M
= 1.3 V @ V
CC
= 3 V
MC74HC574A
http://onsemi.com
6
ORDERING INFORMATION
Device Package Shipping
MC74HC574ADWG SOIC−20 WIDE
(Pb−Free)
38 Units / Rail
MC74HC574ADWR2G SOIC−20 WIDE
(Pb−Free)
1000 Tape & Reel
MC74HC574ADTR2G TSSOP−20
(Pb−Free)
2500 Tape & Reel
NLV74HC574ADTR2G* TSSOP−20
(Pb−Free)
2500 Tape & Reel
MC74HC574AFELG SOEIAJ−20
(Pb−Free)
2000 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.

MC74HC574ADWG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Flip Flops 2-6V CMOS Octal D-Type Non-Inverting
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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