ADM1032
http://onsemi.com
10
Table 11. CONSECUTIVE ALERT REGISTER CODES
Register Value
Number of Out-of-Limit
Measurements Required
yxxx 000x 1
yxxx 001x 2
yxxx 011x 3
yxxx 111x 4
NOTE: x = don’t care bits, and y = SMBus timeout bit.
Default = 0. See SMBus section for more information.
Serial Bus Interface
Control of the ADM1032 is carried out via the serial bus.
The ADM1032 is connected to this bus as a slave device,
under the control of a master device.
There is a programmable SMBus timeout. When this is
enabled, the SMBus times out after typically 25 ms of no
activity. However, this feature is not enabled by default. To
enable it, set Bit 7 of the consecutive alert register
(Address = 22h).
Table 12. LIST OF ADM1032 REGISTERS
Read Address (Hex) Write Address (Hex) Name Power-On Default
Not Applicable Not Applicable Address Pointer Undefined
00 Not Applicable Local Temperature Value 0000 0000 (00h)
01 Not Applicable External Temperature Value High Byte 0000 0000 (00h)
02 Not Applicable Status Undefined
03 09 Configuration 0000 0000 (00h)
04 0A Conversion Rate 0000 1000 (08h)
05 0B Local Temperature High Limit 0101 0101 (55h) (85°C)
06 0C Local Temperature Low Limit 0000 0000 (00h) (0°C)
07 0D External Temperature High Limit High Byte 0101 0101 (55h) (85°C)
08 0E External Temperature Low Limit High Byte 0000 0000 (00h) (0°C)
Not Applicable 0F One-Shot
10 Not Applicable External Temperature Value Low Byte 0000 0000
11 11 External Temperature Offset High Byte 0000 0000
12 12 External Temperature Offset Low Byte 0000 0000
13 13 External Temperature High Limit Low Byte 0000 0000
14 14 External Temperature Low Limit Low Byte 0000 0000
19 19 External THERM Limit 0101 0101 (55h) (85°C) (ADM1032)
0110 1100 (6Ch) (108°C)
(ADM10321)
20 20 Local THERM Limit 0101 0101 (55h) (85°C)
21 21 THERM Hysteresis 0000 1010 (0Ah) (10°C)
22 22 Consecutive ALERT 0000 0001 (01h)
FE Not Applicable Manufacturer ID 0100 0001 (41h)
FF Not Applicable Die Revision Code Undefined
NOTE: Writing to Address 0F causes the ADM1032 to perform a single measurement. It is not a data register as such and it does not
matter what data is written to it.
Addressing the Device
In general, every SMBus device has a 7-bit device address
(except for some devices that have extended, 10-bit
addresses). When the master device sends a device address
over the bus, the slave device with that address responds.
The ADM1032 and the ADM10321 are available with one
SMBus address, which is Hex 4C (1001 100). The
ADM10322 is also available with one SMBus address;
however, that address is Hex 4D (1001 101).
The serial bus protocol operates as follows:
1. The master initiates data transfer by establishing a
START condition, defined as a high-to-low
transition on the serial data line SDATA, while the
serial clock line SCLK remains high. This
indicates that an address/data stream follows. All
slave peripherals connected to the serial bus
respond to the START condition and shift in the
next eight bits, consisting of a 7-bit address (MSB
first) plus an R/W
bit, which determines the
ADM1032
http://onsemi.com
11
direction of the data transfer, that is, whether data
is written to or read from the slave device.
The peripheral whose address corresponds to the
transmitted address responds by pulling the data
line low during the low period before the ninth
clock pulse, known as the acknowledge bit. All
other devices on the bus now remain idle while the
selected device waits for data to be read from or
written to it. If the R/W
bit is a 0, the master writes
to the slave device. If the R/W
bit is a 1, the
master reads from the slave device.
2. Data is sent over the serial bus in sequences of
nine clock pulses, eight bits of data followed by an
acknowledge bit from the slave device. Transitions
on the data line must occur during the low period
of the clock signal and remain stable during the
high period, since a low-to-high transition when
the clock is high can be interpreted as a STOP
signal. The number of data bytes that can be
transmitted over the serial bus in a single read or
write operation is limited only by what the master
and slave devices can handle.
3. When all data bytes are read or written, stop
conditions are established. In write mode, the
master pulls the data line high during the 10th
clock pulse to assert a STOP condition. In read
mode, the master device overrides the
acknowledge bit by pulling the data line high
during the low period before the ninth clock pulse.
This is known as no acknowledge. The master then
takes the data line low during the low period
before the 10th clock pulse, and high during the
10th clock pulse to assert a STOP condition.
Any number of bytes of data can be transferred over the
serial bus in one operation, but it is not possible to mix read
and write in one operation because the type of operation is
determined at the beginning and cannot subsequently be
changed without starting a new operation.
In the case of the ADM1032, write operations contain
either one or two bytes, while read operations contain one
byte and perform the following functions.
To write data to one of the device data registers or read
data from it, the address pointer register must first be set so
that the correct data register is addressed. The first byte of
a write operation always contains a valid address that is
stored in the address pointer register. If data is written to the
device, the write operation contains a second data byte that
is written to the register selected by the address pointer
register.
This is illustrated in Figure 13. The device address is sent
over the bus followed by R/W
set to 0. This is followed by
two data bytes. The first data byte is the address of the
internal data register to be written to, which is stored in the
address pointer register. The second data byte is the data to
be written to the internal data register.
When reading data from a register, there are two
possibilities:
1. If the address pointer register value is unknown or
not the desired value, it is first necessary to set it
to the correct value before data can be read from
the desired data register. This is done by
performing a write to the ADM1032 as before, but
only the data byte containing the register read
address is sent because data is not to be written to
the register. This is shown in Figure 14.
A read operation is then performed consisting of
the serial bus address, R/W
bit set to 1, followed
by the data byte read from the data register. This is
shown in Figure 15.
2. If the address pointer register is known to be at the
desired address already, data can be read from the
corresponding data register without first writing to
the address pointer register and Figure 14 can be
omitted.
NOTES:
1. Although it is possible to read a data byte from a data
register without first writing to the address pointer register,
if the address pointer register is already at the correct value,
it is not possible to write data to a register without writing to
the address pointer register. The first data byte of a write is
always written to the address pointer register.
2. Don’t forget that some of the ADM1032 registers have
different addresses for read and write operations. The write
address of a register must be written to the address pointer
if data is to be written to that register, but it is not possible
to read data from that address. The read address of a
register must be written to the address pointer before data
can be read from that register.
ADM1032
http://onsemi.com
12
Figure 13. Writing a Register Address to the Address Pointer Register,
then Writing Data to the Selected Register
R/W
A6
SCLK
SDATA
A5 A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADM1032
START BY
MASTER
191
ACK. BY
ADM1032
9
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADM1032
STOP BY
MASTER
1
9
SCLK (CONTINUED)
SDATA (CONTINUED)
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
FRAME 3
DATA BYTE
Figure 14. Writing to the Address Pointer Register Only
SCLK
SDATA
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADM1032
START BY
MASTER
19
1
ACK. BY
ADM1032
9
STOP BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
R/W
A2A3A4A5A6
Figure 15. Reading Data from a Previously Selected Register
SCLK
SDATA
D7
D6
D5
D4
D3
D2
D1
D0
START BY
MASTER
9
1
ACK. BY
ADM1032
9
STOP BY
MASTER
A1 A0
1
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
DATA BYTE FROM ADM1032
R/W
A2A3A4A5A6
ACK. BY
ADM1032
ALERT Output
The ALERT output goes low whenever an out-of-limit
measurement is detected, or if the remote temperature sensor
is open-circuit. It is an open drain and requires a pullup to
V
DD
. Several ALERT outputs can be wire-OR’ed together
so that the common line goes low if one or more of the
ALERT
outputs goes low.
The ALERT
output can be used as an interrupt signal to a
processor, or it can be used as an SMBALERT
. Slave devices
on the SMBus can not normally signal to the master that they
want to talk, but the SMBALERT
function allows them to do
so.
One or more ALERT
outputs can be connected to a
common SMBALERT
line connected to the master. When
the SMBALERT
line is pulled low by one of the devices, the
following procedure occurs (see Figure 16).
Figure 16. Use of SMBALERT
ALERT RESPONSE
ADDRESS
MASTER SENDS
ARA AND READ
COMMAND
DEVICE SENDS
ITS ADDRESS
RDSTART ACK
DEVICE
ADDRESS
NO
ACK
STOP
MASTER
RECEIVES
SMBALERT
1. SMBALERT is pulled low.
2. Master initiates a read operation and sends the
alert response address (ARA = 0001 100). This is
a general call address that must not be used as a
specific device address.
3. The device whose ALERT
output is low responds
to the alert response address and the master reads
its device address. Since the device address is

ADM1032ARMZ-2R

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Board Mount Temperature Sensors 8-PIN TDM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union