MC74HC251ADTR2G

MC74HC251A
http://onsemi.com
4
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Symbol Parameter
V
CC
V
Guaranteed Limit
Unit
55 to
25°C
v 85°C v 125°C
t
PLH
,
t
PHL
Maximum Propagation Delay, Input D to Output Y or Y
(Figures 2, 3 and 6)
2.0
4.5
6.0
185
37
31
230
46
39
280
56
48
ns
t
PLH
,
t
PHL
Maximum Propagation Delay, Input A to Output Y or Y
(Figures 3 and 6)
2.0
4.5
6.0
205
41
35
255
51
43
310
62
53
ns
t
PLZ
,
t
PHZ
Maximum Propagation Delay, Output Enable to Output Y
(Figures 5 and 7)
2.0
4.5
6.0
195
39
33
245
49
42
295
59
50
ns
t
PZL
,
t
PZH
Maximum Propagation Delay, Output Enable to Output Y
(Figures 5 and 7)
2.0
4.5
6.0
145
29
25
180
36
31
220
44
38
ns
t
PLZ
,
t
PHZ
Maximum Propagation Delay, Output Enable to Output Y
(Figures 5 and 7)
2.0
4.5
6.0
220
44
37
275
55
47
330
66
56
ns
t
PZL
,
t
PZH
Maximum Propagation Delay, Output Enable to Output Y
(Figures 5 and 7)
2.0
4.5
6.0
150
30
26
190
38
33
225
45
38
ns
t
TLH
,
t
THL
Maximum Output Transition Time, Any Output
(Figures 2 and 6)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
C
in
Maximum Input Capacitance 10 10 10 pF
C
out
Maximum ThreeState Output Capacitance
(Output in HighImpedance
State)
15 15 15 pF
C
PD
Power Dissipation Capacitance (Per Package)
Typical @ 25°C, V
CC
= 5.0 V
pF
36
PIN DESCRIPTIONS
INPUTS
D0, D1, , D7 (Pins 4, 3, 2, 1, 15, 14, 13, 12)
Data inputs. Data on one of these eight binary inputs may
be selected to appear on the output.
CONTROL INPUTS
A0, A1, A2 (Pins 11, 10, 9)
Address inputs. The data on these pins are the binary
address of the selected input (see the Function Table).
Output Enable (Pin 7)
Output Enable. This input pin must be at a low level for
the selected data to appear at the outputs. If the Output
Enable pin is high, both the Y and Y
outputs are taken to the
highimpedance state.
OUTPUTS
Y, Y (Pins 5, 6)
Data outputs. The selected data is presented at these pins
in both true (Y output) and complemented (Y
output) forms.
MC74HC251A
http://onsemi.com
5
SWITCHING WAVEFORMS
Figure 2. Figure 3.
Figure 4.
V
CC
GND
t
f
t
r
INPUT D
OUTPUT Y
10%
50%
90%
10%
50%
90%
t
TLH
t
PLH
t
PHL
t
THL
t
r
t
f
V
CC
GND
INPUT D
OUTPUT Y
t
PHL
t
PLH
t
TLH
t
THL
10%
50%
90%
10%
50%
90%
V
CC
GND
50%
INPUT A
t
PLH
t
PHL
50%
OUTPUT
Y OR Y
Figure 5.
VALIDVALID
OUTPUT
ENABLE
Y OR Y
Y OR Y
50%
50%
50%
90%
10%
t
PZL
t
PLZ
t
PZH
t
PHZ
V
CC
GND
HIGH
IMPEDANCE
V
OL
V
OH
HIGH
IMPEDANCE
TEST CIRCUITS
*Includes all probe and jig capacitance
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 6.
*Includes all probe and jig capacitance
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 7.
CONNECT TO V
CC
WHEN
TESTING t
PLZ
AND t
PZL
.
CONNECT TO GND WHEN
TESTING t
PHZ
AND t
PZH
.
1 kW
MC74HC251A
http://onsemi.com
6
Y
Y
5
6
D0
D1
D2
D3
D4
D5
D6
D7
A
B
C
4
3
2
1
15
14
13
12
11
10
9
7
DATA
INPUTS
Figure 8. Expanded Logic Diagram
DATA
OUTPUTS
OUTPUT
ENABLE
ORDERING INFORMATION
Device Package Shipping
MC74HC251ADG SOIC16
(PbFree)
48 Units / Rail
MC74HC251ADR2G SOIC16
(PbFree)
2500 Tape & Reel
MC74HC251ADTR2G TSSOP16* 2500 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently PbFree.

MC74HC251ADTR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Encoders, Decoders, Multiplexers & Demultiplexers 4 CH. EMI FILTER 3ST 8INPUT
Lifecycle:
New from this manufacturer.
Delivery:
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