OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

AD8346ARU-REEL7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
AD8346
Rev. A | Page 3 of 20
SPECIFICATIONS
V
S
= 5 V; T
A
= 25°C; LO frequency = 1900 MHz; LO level = –10 dBm; BB frequency = 100 kHz; BB inputs are dc-biased to 1.2 V; BB input
level = 1.0 V p-p each pin for 2.0 V p-p differential drive; LO source and RF output load impedances are 50 Ω, dBm units are referenced
to 50 Ω unless otherwise noted.
Table 1.
Parameters Conditions Min Typ Max Unit
RF OUTPUT
Operating Frequency 0.8 2.5 GHz
Quadrature Phase Error See Figure 35 for setup 1 Degree rms
I/Q Amplitude Balance See Figure 35 for setup 0.2 dB
Output Power I and Q channels in quadrature −13 −10 −6 dBm
Output VSWR 1.25:1
Output P1 dB −3 dBm
Carrier Feedthrough −42 −35 dBm
Sideband Suppression −36 −25 dBc
IM3 Suppression −60 dBc
Equivalent Output IP3 20 dBm
Output Noise Floor 20 MHz offset from LO −147 dBm/Hz
RESPONSE TO CDMA IS95 BASEBAND SIGNALS
ACPR (Adjacent Channel Power Ratio) See Figure 35 for setup −72 dBc
EVM (Error Vector Magnitude) See Figure 35 for setup 2.5 %
Rho (Waveform Quality Factor) See Figure 35 for setup 0.9974
MODULATION INPUT
Input Resistance 12 kΩ
Modulation Bandwidth −3 dB 70 MHz
LO INPUT
LO Drive Level −12 −6 dBm
Input VSWR 1.9:1
ENABLE
ENBL HI Threshold 2.0 V
ENBL LO Threshold 0.5 V
ENBL Turn-On Time
Settle to within 0.5 dB of final SSB
output power
2.5 μs
ENBL Turn-Off Time
Time for supply current to drop below
2 mA
12 μs
POWER SUPPLIES
Voltage 2.7 5.5 V
Current Active (ENBL HI) 35 45 55 mA
Current Standby (ENBL LO) 1 20 μA
AD8346
Rev. A | Page 4 of 20
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Min Rating
Supply Voltage VPS1, VPS2 5.5 V
Input Power LOIP, LOIN (relative to 50 Ω) 10 dBm
Min Input Voltage IBBP, IBBN, QBBP, QBBN 0 V
Max Input Voltage IBBP, IBBN, QBBP, QBBN 2.5 V
Internal Power Dissipation 500 mW
θJA 125°C/W
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering 60 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other condition s above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
AD8346
Rev. A | Page 5 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
IBBP QBBP
AD8346
TOP VIEW
(Not to Scale)
IBBN QBBN
COM1 COM4
COM1 COM4
LOIN VPS2
LOIP VOUT
VPS1 COM3
ENBL COM2
05335-002
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
Equivalent
Circuit
1 IBBP
I Channel Baseband Positive Input Pin. Input should be dc-biased to approximately 1.2 V.
Nominal characterized ac swing is 1 V p-p (0.7 V to 1.7 V). This makes the differential input
2 V p-p when IBBN is 180 degrees out of phase from IBBP.
Circuit A
2 IBBN
I Channel Baseband Negative Input Pin. Input should be dc-biased to approximately 1.2 V.
Nominal characterized ac swing is 1 V p-p (0.7 V to 1.7 V). This makes the differential input
2 V p-p when IBBN is 180 degrees out of phase from IBBP.
Circuit A
3 COM1 Ground Pin for the LO phase splitter and LO buffers.
4 COM1 Ground Pin for the LO phase splitter and LO buffers.
5 LOIN
LO Negative Input Pin. Internal dc bias (approximately VPS1 to 800 mV) is supplied. This
pin must be ac coupled.
Circuit B
6 LOIP
LO Positive Input Pin. Internal dc bias (approximately VPS1 to 800 mV) is supplied. This pin
must be ac-coupled.
Circuit B
7 VPS1
Power Supply Pin for the bias cell and LO buffers. This pin should be decoupled using
local 100 pF and 0.01 μF capacitors.
8 ENBL Enable Pin. A high level enables the device; a low level puts the device in sleep mode. Circuit C
9 COM2 Ground Pin for the input stage of output amplifier.
10 COM3 Ground Pin for the output stage of output amplifier.
11 VOUT 50 Ω DC-Coupled RF Output. User must provide ac coupling on this pin. Circuit D
12 VPS2
Power Supply Pin for baseband input voltage to current converters and mixer core. This
pin should be decoupled using local 100 pF and 0.01 μF capacitors.
13 COM4 Ground Pin for baseband input voltage to current converters and mixer core.
14 COM4 Ground Pin for baseband input voltage to current converters and mixer core.
15 QBBN
Q Channel Baseband Negative Input. Input should be dc biased to approximately 1.2 V.
Nominal characterized ac swing is 1 V p-p. This makes the differential input 2 V p-p when
QBBN is 180° out of phase from QBBP.
Circuit A
16 QBBP
Q Channel Baseband Positive Input. Input should be dc-biased to approximately 1.2 V.
Nominal characterized ac swing is 1 V p-p. This makes the differential input 2 V p-p when
QBBN is 180° out of phase from QBBP.
Circuit A
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

AD8346ARU-REEL7

Mfr. #:
Buy AD8346ARU-REEL7
Manufacturer:
Description:
Modulator / Demodulator 2.5GHz Direct Conversion Quadratre
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet