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LTC1590IN#PBF

P1-P3P4-P6P7-P9P10-P12
7
LTC1590
TIMING DIAGRAMS
WUW
D11 A
MSB
D10 A D9 A D1 B
t
1
t
6
D0 B
LSB
t
2
t
4
t
3
t
9
CLK
D
IN
D
OUT
CS/LD
t
5
1590 TD02
D11 A
PREVIOUS WORD
D10 A
PREVIOUS WORD
D0 B
PREVIOUS WORD
D11 A
CURRENT WORD
D9 A
PREVIOUS WORD
t
8
t
7
12
3
23 24
TIMING DIAGRAM
APPLICATIONS INFORMATION
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Description
The LTC1590 is a dual 12-bit multiplying DAC that has
serial inputs and current outputs. It uses precision R/2R
resistor ladder technology to provide exceptional linearity
and stability. The device operates from a single 5V supply
and provides a ±10V reference input and voltage output
range when used with an external op amp.
Serial I/O
The LTC1590 has a 3-wire SPI/MICROWIRE
TM
compatible
serial port that accepts 24-bit serial words. Data is loaded
MSB first with the first 12 bits controlling DAC A and the
second 12 bits controlling DAC B. Data is shifted into the
D
IN
input on the rising edge of CLK. The CS/LD input must
be taken low before transferring data to enable the CLK
input. After transferring data, CS/LD is pulled high to load
data from the shift register to the DAC registers which
updates both DACs.
The buffered output of the 24-bit shift register is available
on the D
OUT
pin. Multiple DACs can be daisy-chained on
one 3-wire interface by connecting the D
OUT
pin to the D
IN
pin of the next DAC (see the Timing Diagrams section).
MICROWIRE is a trademark of National Semiconductor Corporation.
R
R
R
O
V
REF A
V
REF B
R
FB A
R
FB B
OUT1 A
OUT1 B
OUT2 A
OUT2 B
AGND
1590 F01
I
LKG
C
OUT
CODE
4096
V
REF
R
()()
Equivalent Circuit
Figure 1 shows an equivalent analog circuit for the LTC1590
DACs. R is the reference input, R
REF
, which is nominally
11k. The DAC output is represented by the Thevinin
equivalent current source with a value of:
(Code/4096)(V
REF
/R)
The current source I
LKG
models the junction leakage of the
DAC output switches. I
LKG
is typically less than 5nA at
85°C and decreases by roughly two times for every 10°C
reduction in temperature. C
OUT
is the output capacitance,
and it also comes from the DAC output switches and varies
from 30pF at zero scale to 60pF at full scale. R
O
is the
equivalent output resistance, which varies with digital
input code (see Op Amp Selection section).
Figure 1. Equivalent Circuit
8
LTC1590
Unipolar 2-Quadrant Multiplying Mode
(V
OUT
= 0V to –V
REF
)
The LTC1590 can be used with a dual op amp to provide
a dual 2-quadrant multiplying DAC as shown in Figure 2.
The unipolar DAC transfer function is shown in Table 1.
The 33pF feedback capacitor is recommended to compen-
sate for the pole caused by the internal feedback resistor
and the OUT1 output capacitance. For high speed op amps
this feedback capacitor is required for stability, and a
smaller value, 8pF to 15pF, may be desired to get the
fastest transient response and shortest settling time. A
larger feedback capacitor can be used to reduce wideband
noise, glitch impulse and distortion for lower frequency
signals. A pole is introduced in the DAC transfer function
at approximately (C
FB
)(R
FB
). For example, a 100pF feed-
back capacitor will typically give a pole at:
145
1
2100 11
kHz
pF k
=
()()
πΩ
APPLICATIONS INFORMATION
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Figure 3. Bipolar Operation (4-Quadrant Multiplication)
–15V
5V
0.1µF
V
CC
V
REF
LTC1590
DAC A OR DAC B
R
FB
DGND AGND
V
REF
–10V TO 10V
OUT1
OUT2
V
OUT
–V
REF
TO V
REF
1590 F03
15V
–
+
1/2
LT1112
R3
20k
R1
10k
R2
20k
15V
–15V
–
+
1/2
LT1112
33pF
Table 1. Unipolar Binary Code Table
DIGITAL INPUT
BINARY NUMBER ANALOG OUTPUT
IN DAC REGISTER V
OUT
MSB LSB
1111 1111 1111 –V
REF
(4095/4096)
1000 0000 0000 –V
REF
(2048/4096) = –V
REF
/2
0000 0000 0001 –V
REF
(1/4096)
0000 0000 0000 0V
Bipolar 4-Quadrant Multiplying Mode
(V
OUT
= –V
REF
to +V
REF
)
The circuit of Figure 3 can be used to provide a dual
4-quadrant multiplying DAC. This circuit starts with the
unipolar application circuit and adds three resistors and an
op amp. These extra devices provide a gain of –2 from the
unipolar output to the bipolar output, plus an offset of
(–1)(V
REF
) to produce the transfer function shown in Table
2. A pack of matched 20k resistors, with two resistors in
parallel forming the 10k resistor, is recommended.
Table 2. Bipolar Offset Binary Code Table
DIGITAL INPUT
BINARY NUMBER ANALOG OUTPUT
IN DAC REGISTER V
OUT
MSB LSB
1111 1111 1111 +V
REF
(2047/2048)
1000 0000 0001 +V
REF
(1/2048)
1000 0000 0000 0V
0111 1111 1111 –V
REF
(1/2048)
0000 0000 0000 –V
REF
(2048/2048) = – V
REF
V
CC
V
REF
LTC1590
DAC A OR DAC B
R
FB
DGND AGND
5V
V
REF
–10V TO 10V
OUT2
OUT1
33pF
V
OUT
0V TO –V
REF
1590 F02
0.1µF
–
+
1/2
LT1112
15V
–15V
Figure 2. Unipolar Operation (2-Quadrant Multiplication)
9
LTC1590
APPLICATIONS INFORMATION
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Op Amp Selection
To maintain the excellent accuracy and stability of the
LTC1590 thought should be given to op amp selection.
Fortunately, the sensitivity of INL and DNL to op amp offset
has been significantly reduced compared to competing
parts of this type. The op amp’s V
OS
causes DAC output
offset. In addition, because the DAC’s equivalent output
resistance R
O
changes as a function of code, there is a
code-dependent DAC output error proportional to V
OS
. For
fixed reference applications this causes gain, INL and DNL
error. For multiplying applications, a code-dependent, DC
output voltage error is seen. At zero scale the DAC output
error is equal to the op amp offset, and at full scale the
output error is equal to twice the op amp offset. For
example, a 1mV op amp offset will cause a 0.41LSB zero-
scale error and a 0.82LSB full-scale error with a 10V full-
scale range. The offset caused INL error is approximately
0.4 times the op amp V
OS
and DNL error is 0.07 times op
amp V
OS
. For the same example of 1mV op amp V
OS
and
10V full-scale range, the INL degradation will be 0.17LSB
and DNL degradation will be 0.03LSB.
Op amp bias current causes only an offset error equal to
(I
BIAS
)(R
FB
) ≈ (I
BIAS
)(11kΩ). For example, a 100nA op
amp bias current causes a 1.1mV DAC offset, or 0.45LSB
for a 10V full-scale range. It is important to note that
connecting the op amp noninverting input to ground
through a resistor will not cancel bias current errors and
should never be done! Similarly an offset caused by op
amp bias current should not be adjusted by using the op
amp null pins since this increases offset between DAC
OUT1 and OUT2 pins, causing INL, DNL and gain errors.
If op amp offset error adjustment is required, the op amp
input offset voltage (the voltage difference between OUT1
and OUT2) should be nulled.
Grounding
As with any high precision data converter, clean ground-
ing is important. A low impedance analog ground plane
and star grounding should be used. OUT2 carries the
complementary DAC output current and should be tied to
the star ground with as low a resistance as possible. Other
ground points that must be tied to the star ground point
include the V
REF
input ground, the op amp noninverting
input(s) and the V
OUT
ground reference point.
13
14
11
12
15
DATA IN
SERIAL CLOCK
CHIP SELECT/DAC LOAD
DATA OUT
CLEAR
16
98
1
2
10
1590 TA07
3
5
7
1
8
6
4
5
6
2
3
4
V
OUT B
V
OUT A
5V
V
IN B
±10V
V
IN A
±10V
7
33pF
0.1µF
0.01µF
33pF
15V
–15V
0.01µF
V
OUT
= –V
IN
D
4096
()
DAC B
V
REF B
R
FB B
V
REF A
R
FB A
DAC A
24-BIT
SHIFT
REG
AND
LATCH
D
IN
CLK
CS/LD
D
OUT
CLR
DGND
AGND
LTC1590
OUT1 B
OUT2 B
OUT2 A
OUT1 A
+
–
+
–
1/2
LT1358
1/2
LT1358
TYPICAL APPLICATIONS
U
Dual Programmable Attenuator
P1-P3P4-P6P7-P9P10-P12

LTC1590IN#PBF

Mfr. #:
Buy LTC1590IN#PBF
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 2x Serial 12-B Mult DAC
Lifecycle:
New from this manufacturer.
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