BD9152MUV
Technical Note
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2010 ROHM Co., Ltd. All rights reserved.
Operation
BD9152MUV is a synchronous rectifying step-down switching regulator that achieves faster transient response by employing
current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for heavier load,
while it utilizes SLLM (Simple Light Load Mode) operation for lighter load to improve efficiency.
Synchronous rectifier
It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC,
and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power
dissipation of the set is reduced.
Current mode PWM control
Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback.
PWM (Pulse Width Modulation) control
The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a highside MOS FET (while a lowside MOS
FET is turned OFF), and an inductor current I
L
increases. The current comparator (Current Comp) receives two signals,
a current feedback control signal (SENSE: Voltage converted from I
L
) and a voltage feedback control signal (FB), and
issues a RESET signal if both input signals are identical to each other, and turns OFF the highside MOS FET (while a
lowside MOS FET is turned ON) for the rest of the fixed period. The PWM control repeat this operation.
SLLM (Simple Light Load Mode) control
When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse is
designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without
voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa.
Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current Comp,
it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is tuned
OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces the switching
dissipation and improves the efficiency.
Fig.27 Diagram of current mode PWM control
OSC
Level
Shift
Driver
Logic
RQ
S
IL
SW
ITH
Current
Comp
Gm Amp.
SET
RESET
FB
Load
SENSE
V
OUT
V
OUT
Fi
g.
28
PWM
sw
i
tc
hi
ng t
i
m
i
ng c
h
art
Fig.29 SLLM
TM
switching timing chart
Curren
t
Comp
SET
RESET
SW
V
OUT
PVCC
GND
GND
GND
I
L(AVE)
V
OUT(AVE)
SENSE
FB
Curren
t
Comp
SET
RESET
SW
V
OUT
PVCC
GND
GND
GND
0A
V
OUT(AVE)
SENSE
FB
I
L
Not switching
I
L
BD9152MUV
Technical Note
8/16
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2010.04 - Rev.C
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2010 ROHM Co., Ltd. All rights reserved.
Description of operations
Soft-start function
EN terminal shifted to “High” activates a soft-starter to gradually establish the output voltage with the current limited during
startup, by which it is possible to prevent an overshoot of output voltage and an inrush current.
Shutdown function
With EN terminal shifted to “Low”, the device turns to Standby Mode, and all the function blocks including reference
voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0µF (Typ.).
UVLO function
Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied.
And the hysteresis width of 50mV (Typ.) is provided to prevent output chattering.
Each the outputs have UVLO. It is possible to set output sequence easy.
Fig.30 Soft start, Shutdown, UVLO timing chart
VCC
EN1,2
VOUT2
Hysteresis
100mV
TSS
UVLO2
Hysteresis
50mV
UVLO1
Ch1, Ch2
Standby mode
Ch1, Ch2
Operating mode
UVLO1
Ch1 : standby mode
Ch2 : Operating mode
UVLO1
TSS
VOUT1
discharge ON
TSS
TSS
TSS
TSS
UVLO2
Ch1
Standby mode
Ch2
Standby mode
Ch1, Ch2
Operating mode
EN EN
Natural discharge
Natural discharge Natural discharge
Standby mode
Ch1, Ch2
Operating mode
UVLO1 UVLO2
Ch1
Standby mode
Ch2
Standby mode
discharge ON discharge ON discharge ON
BD9152MUV
Technical Note
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2010.04 - Rev.C
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2010 ROHM Co., Ltd. All rights reserved.
Short-current protection circuit with time delay function
Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for
the fixed time(T
LATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking
UVLO.
Fig.31 Short-current protection circuit with time delay timing chart
Switching regulator efficiency
Efficiency may be expressed by the equation shown below:
Efficiency may be improved by reducing the switching regulator power dissipation factors P
D
as follows:
Dissipation factors:
1) ON resistance dissipation of inductor and FETPD(I
2
R)
2) Gate charge/discharge dissipationPD(Gate)
3) Switching dissipationPD(SW)
4) ESR dissipation of capacitorPD(ESR)
5) Operating current dissipation of ICPD(IC)
1)PD(I
2
R)=IOUT
2
×(RCOIL+RON) (RCOIL[Ω]DC resistance of inductor, RON[Ω]ON resistance of FET, IOUT[A]Output
current.)
2)PD(Gate)=Cgs×f×V (Cgs[F]Gate capacitance of FET, f[H]Switching frequency, V[V]Gate driving voltage of FET)
4)PD(ESR)=I
RMS
2
×ESR (IRMS[A]Ripple current of capacitor, ESR[Ω]Equivalent series resistance.)
5)PD(IC)=Vin×I
CC (ICC[A]Circuit current.)
η=
V
OUT×IOUT
Vin×Iin
×100[%]=
POUT
Pin
×100[%]=
POUT
POUT+PDα
×100[%]
Vin
2
×CRSS×IOUT×f
I
DRIVE
3)PD(SW)=
(C
RSS[F]Reverse transfer capacitance of FET, IDRIVE[A]Peak current of gate.)
Output Short circuit
Threshold Voltage
I
L Limi
t
EN
Timer latch
EN
Standby
mode
Operating mode
Operating mode
Standby
mode
EN1EN2
t2=TLATCH
VOUT2
I
L1
t1<TLATCH
Output OFF
Latch

BD9152MUV-E2

Mfr. #:
Manufacturer:
Description:
Switching Voltage Regulators 4.5-5.5V 1.5A; Dual Step-Down
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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