Philips Semiconductors Product specification
74F7864-bit asynchronous bus arbiter
February 14, 1991
3
FUNCTIONAL DESCRIPTION
The BRn inputs have no inherent priority. The arbiter assigns priority
to the incoming requests as they are received, therefore, the first BR
asserted will have the highest priority. When a bus request is
received its corresponding bus grant becomes active, provided that
EN
is low. If additional bus requests are made during this time they
are queued. When the first request is removed, the arbiter services
the bus request with the next highest priority. Removing a request
while a previous request is being serviced can cause a grant to be
changed when arbitrating between three or four requests. For that
reason, the user should not remove ungranted requests when
arbitrating between three or four requests. This does not apply to
arbitration between two requests.
If two or more BR
n inputs are asserted at precisely the same time,
one of them will be selected at random, and all BG
n outputs will be
held in the high state until the selection is made. This guarantees
that an erroneous BG
n will not be generated even though a
metastable condition may occur internal to the device. When the EN
is in the high state the BGn outputs are forced high.
PIN CONFIGURATION
16
15
14
13
12
11
107
6
5
4
3
2
1
98
V
CC
B
C
D
BR
0
BR
1
BR
2
BR3
GND
A
YOUT
BG
0
BG1
BG
2
BG
3
EN
SF00441
PIN DESCRIPTION
SYMBOL PINS TYPE NAME FUNCTION
BR0 – BR3 4, 5, 6, 7 Input Bus request inputs (active low)
The logic of this device arbitrates between these four inputs.
Unused inputs should be tied high.
A, B, C, D 15, 1, 2, 3 Input Inputs of the 4–input AND gate
EN 9 Input Enable input When low it enables the BG0 – BG3 outputs.
BG0 – BG3 13, 12, 11, 10 Output Bus grant outputs (active low)
These outputs indicate the selected bus request. BG0 corre-
sponds to BR0, BG1 to BR1, etc.
YOUT 14 Output Output of the 4–input AND gate
GND 8 Ground ground (0V)
V
CC
16 Power Positive supply voltages
