OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

SZESD9101P2T5G

P1-P3P4-P6P7-P7
ESD9101
www.onsemi.com
4
Figure 5. Positive TLP IV Curve
Figure 6. Negative TLP IV Curve
TLP CURRENT (A)
V
C
, VOLTAGE (V)
20
16
12
8
4
0
05312 4 6 8 10
TLP CURRENT (A)
V
C
, VOLTAGE (V)
−20
−16
−12
−8
−4
0
NOTE: TLP parameter: Z
0
= 50 W, t
p
= 100 ns, t
r
= 300 ps, averaging window: t
1
= 30 ns to t
2
= 60 ns. V
IEC
is the equivalent voltage
stress level calculated at the secondary peak of the IEC 61000−4−2 waveform at t = 30 ns with 2 A/kV. See TLP description
below for more information.
97
10
8
6
4
2
0
EQUIVALENT V
IEC
(kV)
18
14
10
6
2
−18
−14
−10
−6
−2
05312 4 6 8 1097
10
8
6
4
2
0
EQUIVALENT V
IEC
(kV)
Transmission Line Pulse (TLP) Measurement
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 7. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 8 where an 8 kV IEC 61000−4−2
current waveform is compared with TLP current pulses at
8 A and 16 A. A TLP I−V curve shows the voltage at which
the device turns on as well as how well the device clamps
voltage over a range of current levels. For more information
on TLP measurements and how to interpret them please
refer to AND9007/D.
Figure 7. Simplified Schematic of a Typical TLP
System
DUT
L
S
÷
Oscilloscope
Attenuator
10 MW
V
C
V
M
I
M
50 W Coax
Cable
50 W Coax
Cable
Figure 8. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms
ESD9101
www.onsemi.com
5
Figure 9. IV Characteristics
I (A)
V (V)
−2 −1 1 2 4 5310
1.E−12
0.5 1 1.5 2 2.5 3 3.5 4.54
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
C
J
, CAPACITANCE (pF)
FREQUENCY (GHz)
5 5.5 6 6.5 7 7.5 8 98.5 109.5
TBD
Figure 10. CV Characteristics
C
J
, CAPACITANCE (pF)
V
R
, REVERSE VOLTAGE (V)
0 0.5 1 1.5 2 2.5 3 3.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
TBD
Figure 11. Junction Capacitance vs.
Frequency
06789
1.E−11
1.E−10
1.E−09
1.E−08
1.E−07
1.E−06
1.E−05
1.E−04
1.E−03
1.E−02
1.E−01
1.E+00
Figure 12. ESD9101 Insertion Loss
TBD
ESD9101
www.onsemi.com
6
Latch-Up Considerations
ON Semiconductor’s 9100 series of ESD protection
devices utilize a snap-back, SCR type structure. By using
this technology, the potential for a latch-up condition was
taken into account by performing load line analyses of
common high speed serial interfaces. Example load lines for
latch-up free applications and applications with the potential
for latch-up are shown below with a generic IV
characteristic of a snapback, SCR type structured device
overlaid on each. In the latch-up free load line case, the IV
characteristic of the snapback protection device intersects
the load-line in one unique point (V
OP
, I
OP
). This is the only
stable operating point of the circuit and the system is
therefore latch-up free. In the non-latch up free load line
case, the IV characteristic of the snapback protection device
intersects the load-line in two points (V
OPA
, I
OPA
) and
(V
OPB
, I
OPB
). Therefore in this case, the potential for
latch-up exists if the system settles at (V
OPB
, I
OPB
) after a
transient. Due to its high holding current, the ESD9101 is
suitable for HDMI and 5 V active antenna applications
where previous ESD8000 series devices were not. When
designing this part into the application, please note the
latch−up considerations by performing a loadline analysis
corresponding to the data line and ESD9101’s SCR
characteristics. For a more in-depth explanation of latch-up
considerations please refer to Application Note AND9116/D.
Figure 13. Example Load Lines for Latch−up Free Applications and Applications with the Potential for Latch-up
I
V
V
DD
I
SSMAX
I
OP
V
OP
I
V
V
DD
I
SSMAX
I
OPA
V
OPA
I
OPB
V
OPB
Latch−up Free Condition Potential Latch−up Condition
Table 1. SUMMARY OF SCR REQUIREMENTS FOR LATCH-UP FREE APPLICATIONS
Application
VBR (min)
(V)
IH (min)
(mA)
VH (min)
(V)
HDMI 1.4/1.3a TMDS 3.465 54.78 1.0
USB 2.0 LS/FS 3.301 1.76 1.0
USB 2.0 HS 0.482 N/A 1.0
USB 3.0/3.1 SS 2.800 N/A 1.0
DisplayPort 3.600 25.00 1.0
GPS (Active) 5.200 80.00 1.0
ORDERING INFORMATION
Device Package Shipping
†
ESD9101P2T5G
SOD−923
(Pb−Free)
8000 / Tape & Reel
SZESD9101P2T5G
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
P1-P3P4-P6P7-P7

SZESD9101P2T5G

Mfr. #:
Buy SZESD9101P2T5G
Manufacturer:
ON Semiconductor
Description:
TVS Diodes / ESD Suppressors ESD PROTECTION
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet