74ALVCH32244BFG8

INDUSTRIAL TEMPERATURE RANGE
4
IDT74ALVCH32244
3.3V CMOS 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
Symbol Parameter Test Conditions Min. Typ.
(1)
Max. Unit
VIH Input HIGH Voltage Level VCC = 2.3V to 2.7V 1.7 V
VCC = 2.7V to 3.6V 2
V
IL Input LOW Voltage Level VCC = 2.3V to 2.7V 0.7 V
VCC = 2.7V to 3.6V 0.8
IIH Input HIGH Current VCC = 3.6V VI = VCC —— ±A
IIL Input LOW Current VCC = 3.6V VI = GND ±A
IOZH High Impedance Output Current VCC = 3.6V VO = VCC ——±10 µ A
IOZL (3-State Output pins) VO = GND ±10
VIK Clamp Diode Voltage VCC = 2.3V, IIN = –18mA –0.7 –1.2 V
VH Input Hysteresis VCC = 3.3V 100 mV
I
CCL Quiescent Power Supply Current VCC = 3.6V 0.1 40 µA
ICCH VIN = GND or VCC
ICCZ
ΔICC Quiescent Power Supply Current One input at VCC - 0.6V, other inputs at VCC or GND 750 µ A
Variation
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = –40°C to +85°C
NOTE:
1. Typical values are at VCC = 3.3V, +25°C ambient.
BUS-HOLD CHARACTERISTICS
Symbol Parameter
(1)
Test Conditions Min. Typ.
(2)
Max. Unit
IBHH Bus-Hold Input Sustain Current VCC = 3V VI = 2V 75 µ A
IBHL VI = 0.8V 75
IBHH Bus-Hold Input Sustain Current VCC = 2.3V VI = 1.7V 45 µA
IBHL VI = 0.7V 45
IBHHO Bus-Hold Input Overdrive Current VCC = 3.6V VI = 0 to 3.6V ±500 µA
IBHLO
NOTES:
1. Pins with Bus-Hold are identified in the pin description.
2. Typical values are at V
CC = 3.3V, +25°C ambient.
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH32244
3.3V CMOS 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
5
OPERATING CHARACTERISTICS, TA = 25°C
VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V
Symbol Parameter Test Conditions Typical Typical Unit
CPD Power Dissipation Capacitance per Driver Outputs enabled CL = 0pF, f = 10Mhz 32 38 pF
CPD Power Dissipation Capacitance per Driver Outputs disabled 8 10
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2 Skew between any two outputs of the same package and switching in the same direction.
SWITCHING CHARACTERISTICS
(1)
VCC = 2.5V ± 0.2V VCC = 2.7V VCC = 3.3V ± 0.3V
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit
t
PLH Propagation Delay 1 3.7 3.6 1 3 ns
tPHL xAx to xYx
tPZH Output Enable Time 1 5.7 5.4 1 4.4 ns
tPZL xOE to xYx
t
PHZ Output Disable Time 1 5.2 4.6 1 4.1 ns
tPLZ xOE to xYx
t
SK(O) Output Skew
(2)
————500 ps
NOTE:
1. V
IH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Test Conditions
(1)
Min. Max. Unit
VOH Output HIGH Voltage VCC = 2.3V to 3.6V IOH = – 0.1mA VCC – 0.2 V
V
CC = 2.3V IOH = – 6mA 2
V
CC = 2.3V IOH = – 12mA 1.7
V
CC = 2.7V 2.2
V
CC = 3V 2.4
VCC = 3V IOH = – 24mA 2
V
OL Output LOW Voltage VCC = 2.3V to 3.6V IOL = 0.1mA 0.2 V
V
CC = 2.3V IOL = 6mA 0.4
I
OL = 12mA 0.7
V
CC = 2.7V IOL = 12mA 0.4
VCC = 3V IOL = 24mA 0.55
INDUSTRIAL TEMPERATURE RANGE
6
I
DT74ALVCH32244
3.3V CMOS 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
Open
VLOAD
GND
VCC
Pulse
Generator
D.U.T.
500Ω
500Ω
CL
RT
VIN
VOUT
(1, 2)
LVC Link
INPUT
VIH
0V
V
OH
VOL
tPLH1
tSK (x)
OUTPUT 1
OUTPUT 2
t
PHL1
tSK (x)
tPLH2
tPHL2
VT
VT
VOH
VT
VOL
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
LVC Link
SAME PHASE
INPUT TRANSITION
OPPOSITE PHASE
INPUT TRANSITION
0V
0V
V
OH
VOL
tPLH
tPHL
tPHL
tPLH
OUTPUT
VIH
VT
VT
VIH
VT
LVC Link
DATA
INPUT
0V
0V
0V
0V
tREM
TIMING
INPUT
ASYNCHRONOUS
CONTROL
SYNCHRONOUS
CONTROL
t
SU
tH
tSU
tH
VIH
VT
VIH
VT
VIH
VT
VIH
VT
LVC Link
LOW-HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
VT
tW
VT
LVC Link
CONTROL
INPUT
tPLZ
0V
OUTPUT
NORMALLY
LOW
tPZH
0V
SWITCH
CLOSED
OUTPUT
NORMALLY
HIGH
ENABLE
DISABLE
SWITCH
OPEN
tPHZ
0V
V
OL+VLZ
VOH
VT
VT
tPZL
VLOAD/2
VLOAD/2
VIH
VT
VOL
VOH-VHZ
LVC Link
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuit for All Outputs
Enable and Disable Times
Set-up, Hold, and Release Times
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2ns; tR 2ns.
Output Skew - tSK(X)
Pulse Width
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
Symbol VCC
(1)
= 3.3V±0.3V VCC
(1)
= 2.7V VCC
(2)
= 2.5V±0.2V Unit
VLOAD 6 6 2 x Vcc V
VIH 2.7 2.7 Vcc V
VT 1.5 1.5 Vcc / 2 V
VLZ 300 300 150 mV
VHZ 300 300 150 mV
C
L 50 50 30 pF
TEST CONDITIONS
SWITCH POSITION
Test Switch
Open Drain
Disable Low V
LOAD
Enable Low
Disable High GND
Enable High
All Other Tests Open

74ALVCH32244BFG8

Mfr. #:
Manufacturer:
IDT
Description:
Buffers & Line Drivers 16BIT BUFF/DRIVER
Lifecycle:
New from this manufacturer.
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