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ATF750CL-15SC

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25
13
0776L–PLD–11/08
ATF750C(L)
26. Software Compiler Mode Selection
27. Third Party Programmer Support
Note: 1. The ATF750C has 14,504 JEDEC fuses.
28. Security Fuse Usage
A single fuse is provided to prevent unauthorized copying of the ATF750C(L) fuse patterns.
Once the security fuse is programmed, all fuses will appear programmed during verify.
The security fuse should be programmed last, as its effect is immediate.
Table 26-1. Software Compiler Mode Selection
Device Atmel - WinCupL Device Mnemonic Pin-keeper
ATF750C-DIP
V750C
V750CPPK
Disabled
Enabled
ATF750C-PLCC
V750LCC
V750CPPKLCC
Disabled
Enabled
Table 27-1. Third Party Programmer Support
Device Description
ATF750C (V750)
V750 Cross-programming. JEDEC file compatible with standard V750 JEDEC
file (total fuses in JEDEC file = 14394). The Programmer will automatically
program “0”s into the User Rrow (UES), and disable the Pin-keeper features. The
Fuse Checksum will be the same as the old ATV750/L file. This device type is
recommended for customers that are directly migrating from an ATV750/L device
to an ATF750C/CL device.
ATF750C (V750B)
V750B Cross-programming. JEDEC file compatible with standard V750B
JEDEC file (total fuses in JEDEC file = 14435). The Programmer will
automatically program “0”s into the User Row (UES), and disable the Pin-keeper
feature. The Fuse Checksum will be the same as the old ATV750B/BL file. This
device type is recommended for customers that are directly migrating from an
ATV750B/BL device to an ATF750C/CL device.
ATF 7 5 0C
Programming of User Row (UES) bits supported and Pin-keeper bit is user-
programmable. (Total fuses in JEDEC file = 14504). This is the default device
type and is recommended for users that have re-compiled their source design
files to specifically target the ATF750C device.
14
0776L–PLD–11/08
ATF750C(L)
29. Preload of Registered Outputs
The ATF750C(L)’s registers are provided with circuitry to allow loading of each register asyn-
chronously with either a high or a low. This feature will simplify testing since any state can be
forced into the registers to control test sequencing. A V
IH
level on the I/O pin will force the regis-
ter high; a V
IL
will force it low, independent of the output polarity. The PRELOAD state is entered
by placing a 10.25V to 10.75V signal on pin 8 on DIPs, and lead 10 on SMDs. When the clock
term is pulsed high, the data on the I/O pins is placed into the register chosen by the select pin
.
Level Forced on Registered
Output Pin during Preload Cycle
Select Pin
State
Register #0 State
after Cycle
Register #1 State
after Cycle
V
IH
Low High X
V
IL
Low Low X
V
IH
High X High
V
IL
High X Low
15
0776L–PLD–11/08
ATF750C(L)
ATF750C SUPPLY CURRENT VS.
SUPPLY VOLTAGE (T
A
= 25°C)
0
20
40
60
80
100
120
140
4.50 4.75 5.00 5.25 5.50
SUPPLY VOLTAGE (V)
I
CC
(mA)
ATF750C SUPPLY CURRENT VS.
SUPPLY VOLTAGE (T
A
= 25°C)
0
20
40
60
80
100
120
140
4.50 4.75 5.00 5.25 5.50
SUPPLY VOLTAGE (V)
I
CC
(mA)
ATF750CL SUPPLY CURRENT
VS. SUPPLY VOLTAGE (T
A
= 25°C)
0
20
40
60
80
100
120
140
160
4.50 4.75 5.00 5.25 5.50
SUPPLY VOLTAGE (V)
I
CC
(µA)
SUPPLY CURRENT VS. FREQUENCY
STANDARD POWER (T
A
= 25°C)
0
40
80
120
160
0 5 10 25 50 75 100
FREQUENCY (MHz)
I
CC
(mA)
SUPPLY CURRENT VS. FREQUENCY
LOW-POWER ("L") VERSION (T
A
= 25°C)
0
20
40
60
80
100
120
140
0 5 10 25 50 75 100
FREQUENCY (MHz)
I
CC
(mA)
ATF750C/CL OUTPUT SOURCE CURRENT
VS. SUPPLY VOLTAGE (V
OH
= 2.4V)
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
44.555.56
SUPPLY VOLTAGE (V)
I
OH
(mA)
ATF750C/CL OUTPUT SOURCE CURRENT
VS. OUTPUT VOLTAGE (V
CC
= 5V, T
A
= 25°C)
-90.00
-80.00
-70.00
-60.00
-50.00
-40.00
-30.00
-20.00
-10.00
0.00
0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00
V
OH
(V)
I
OH
(mA)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25

ATF750CL-15SC

Mfr. #:
Buy ATF750CL-15SC
Manufacturer:
Microchip Technology / Atmel
Description:
CPLD - Complex Programmable Logic Devices 750 GATE LOW POWER - 15NS 24
Lifecycle:
New from this manufacturer.
Delivery:
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