MP1530 – TRIPLE OUTPUT STEP-UP PLUS LINEAR REGULATORS FOR TFT BIAS
MP1530 Rev. 1.41 www.MonolithicPower.com 4
5/25/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
TYPICAL PERFORMANCE CHARACTERISTICS
Circuit of Figure 3, V
IN
= 5V, V
MAIN
= 13V, I
MAIN
= 200mA, V
GL
= -8.5V, I
GL
= 10mA, V
GH
= 27V,
I
GH
= 10mA, T
A
= +25C, unless otherwise noted.
V
EN
5V/div.
V
MAIN
5V/div.
V
MAIN
5V/div.
V
GL
10V/div.
V
GH
10V/div.
V
GL
10V/div.
V
GH
10V/div.
10ms/div.
Power-On Sequence
V
CT
1V/div.
10ms/div.
Power-On Sequence
27.05
27.03
27.01
26.99
26.97
26.95
26.93
26.91
26.89
26.87
26.85
V
GH
(V)
01020304050
I
GH
(mA)
Positive Linear Regulator
Load Regulation
-8.465
-8.475
-8.485
-8.495
-8.505
-8.515
-8.525
-8.535
-8.545
-8.555
-8.565
V
GL
(V)
0 1020304050
I
GL
(mA)
Negative Linear Regulator
Load Regulation
13.005
13.000
12.995
12.990
12.985
12.980
12.975
12.970
12.965
V
MAIN
(V)
1 10 100 1000
I
MAIN
(mA)
Step-Up Converter
Load Regulation
100
90
80
70
60
50
40
30
EFFICIENCY (%)
1 10 100 1000
LOAD CURRENT (mA)
Efficiency vs
Load Current
(Step-Up Converter Only)
V
IN
=3.3V
V
MAIN
=7.5V
V
IN
=5V
MP1530 – TRIPLE OUTPUT STEP-UP PLUS LINEAR REGULATORS FOR TFT BIAS
MP1530 Rev. 1.41 www.MonolithicPower.com 5
5/25/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Circuit of Figure 3, V
IN
= 5V, V
MAIN
= 13V, I
MAIN
= 200mA, V
GL
= -8.5V, I
GL
= 10mA, V
GH
= 27V,
I
GH
= 10mA, T
A
= +25C, unless otherwise noted.
1.50
1.47
1.44
1.41
1.38
1.35
1.32
1.29
1.26
FREQUENCY (MHz)
-50 0 50 100 150
TEMPERATURE (°C)
Oscillator Frequency vs
Temperature
1.256
1.254
1.252
1.250
1.248
1.246
1.244
1.242
1.240
1.238
V
REF
(V)
-50 0 50 100 150
TEMPERATURE (°C)
Reference Voltage vs
Temperature
V
SW
5V/div.
I
INDUCTOR
0.5A/div.
400ns/div.
Normal Operation
I
MAIN
200mA/div.
V
MAIN AC
100mV/div.
Load Transient on
V
MAIN
I
MAIN
= 20mA - 200mA Step
V
CT
1V/div.
V
MAIN
5V/div.
V
GL
10V/div.
V
GH
20V/div.
2ms/div.
Fault Timer
V
MAIN
Shorted to V
IN
V
MAIN AC
50mV/div.
MP1530 – TRIPLE OUTPUT STEP-UP PLUS LINEAR REGULATORS FOR TFT BIAS
MP1530 Rev. 1.41 www.MonolithicPower.com 6
5/25/2011 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
PIN FUNCTIONS
QFN
Pin #
TSSOP
Pin #
Name Description
1 15 SW
Step-Up Converter Power Switch Node. Connect an inductor between the input source
and SW, and connect a rectifier from SW to the main output to complete the step-up
converter. SW is the drain of the internal 250m N-Channel MOSFET switch.
2 16 CT
Timing Capacitor for Power Supply Soft-Start and Power-On Sequencing. A capacitor
from CT to GND controls the soft-start and sequencing turn-on delay periods. See
Power-On Sequencing and Start Up Timing Diagram.
3 1
RDY
Regulators Not Ready. During startup RDY will be left high. Once the turn-on sequence
is complete, this pin will be pulled low if all FB voltages exceed 80% of their specified
thresholds. After all regulators are turned-on, a fault in any regulator that causes the
respective FB voltage to fall below 80% of its threshold will cause
RDY to go high after
approximately 15μs. If the fault persists for more than approximately 6ms (for C
CT
=10nF),
the entire chip will shut down. See Fault Sensing and Timer.
4 2 FB1
Step-Up Converter Feedback Input. FB1 is the inverting input of the internal error
amplifier. Connect a resistive voltage divider from the output of the step-up converter to
FB1 to set the step-up converter output voltage.
5 3 COMP
Step-Up Converter Compensation Node. COMP is the output of the error amplifier.
Connect a series RC network to compensate the regulation control loop of the step-up
converter.
6 4 IN
Internal Power Input. IN supplies the power to the MP1530. Bypass IN to PGND with a
10μF or greater capacitor.
7 5 GND Signal Ground.
8 6 REF
Reference Output. REF is the 1.25V reference voltage output. Bypass REF to GND with
a 0.1μF or greater capacitor. Connect REF to the low-side resistor of the negative linear
regulator feedback string.
9 7 FB2
Negative Linear Regulator Feedback Input. Connect the FB2 feedback resistor string
between GL and REF to set the negative linear regulator output voltage. FB2 regulation
threshold is GND.
10 8 FB3
Positive Linear Regulator Feedback Input. Connect the FB3 feedback resistor string
between GH and GND to set the positive linear regulator output voltage. FB3 regulation
threshold is 1.25V.
11 9 EN
On/Off Control Input. Drive EN high to turn on the MP1530, drive EN low to turn it off. For
automatic startup, connect EN to IN. Once the MP1530 is turned on, it sequences the
outputs on (See Power-On Sequencing). When turned off, all outputs are immediately
disabled.
12 10 GL
Negative Linear Regulator Output. GL is the output of the negative linear regulator. GL
can supply up to 20mA to the load. Bypass GL to GND with a 1μF or greater, low-ESR,
ceramic capacitor.
13 11 IN2
Negative Linear Regulator Input. IN2 is the input of the negative linear regulator. Drive
IN2 with an inverting charge pump powered from SW. IN2 can go as low as -20V. For
QFN package, connect the exposed pad to IN2 pin.

MP1530DM-LF-Z

Mfr. #:
Manufacturer:
Monolithic Power Systems (MPS)
Description:
Switching Voltage Regulators 1.4MHz Triple Output Step-Up for TFT Bias
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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