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74AHCT1G00GW,165
P1-P3
P4-P6
P7-P9
P10-P12
P13-P13
74AHC_AHCT1G00
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP Semiconduc
tors N.V
. 2014. All rig
hts rese
rved.
Product data sheet
Rev
.
7 — 5 November 2014
6 of 12
NXP Semiconductors
74AHC1G00; 74AHCT1G00
2-input NAND gate
12. W
aveforms
Measurement points are given in
T
able 9
.
Fig 5.
The input
s (A and B) to output (Y) prop
agati
on delays
PQD
$%
LQS
XW
<
RXWSXW
W
3+/
W
3/+
9
0
9
0
T
able 9.
Measuremen
t point
Ty
p
e
Input
Output
V
I
V
M
V
M
74AHC1G00
GND to V
CC
0.5
V
CC
0.5
V
CC
74AHCT1G00
GND to 3.0 V
1.5 V
0.5
V
CC
T
est data is given in
T
able 8
. Definitions for test circuit:
C
L
= Load capacitance including jig and probe cap
acitance.
R
T
= T
ermination resistance should be equal to output impedance Z
o
of the pulse generator
.
Fig 6.
T
est
circuit for measuring
switching times
PQD
9
&&
9
,
9
2
5
7
&
/
38/6(
*(1(5$725
'87
74AHC_AHCT1G00
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP Semiconduc
tors N.V
. 2014. All rig
hts rese
rved.
Product data sheet
Rev
.
7 — 5 November 2014
7 of 12
NXP Semiconductors
74AHC1G00; 74AHCT1G00
2-input NAND gate
13. Package
outline
Fig 7.
Package outline SOT3
53-1 (TSSOP5)
81,7
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627
74AHC_AHCT1G00
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP Semiconduc
tors N.V
. 2014. All rig
hts rese
rved.
Product data sheet
Rev
.
7 — 5 November 2014
8 of 12
NXP Semiconductors
74AHC1G00; 74AHCT1G00
2-input NAND gate
Fig 8.
Package outline
SOT753 (SC-74A)
5()(5
(1&(6
287/,
1(
9(5
6,
21
(852
3($1
352-
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627
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$
P1-P3
P4-P6
P7-P9
P10-P12
P13-P13
74AHCT1G00GW,165
Mfr. #:
Buy 74AHCT1G00GW,165
Manufacturer:
Nexperia
Description:
IC GATE NAND 1CH 2-INP 5TSSOP
Lifecycle:
New from this manufacturer.
Delivery:
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EMS
Payment:
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