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NLV74HCT14ADTR2G

P1-P3P4-P6
© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 14
1 Publication Order Number:
MC74HCT14A/D
MC74HCT14A
Hex Schmitt-Trigger
Inverter with LSTTL
Compatible Inputs
High−Performance Silicon−Gate CMOS
The MC74HCT14A may be used as a level converter for interfacing
TTL or NMOS outputs to high−speed CMOS inputs.
The HCT14A is useful to “square up” slow input rise and fall times.
Due to the hysteresis voltage of the Schmitt trigger, the HCT14A finds
applications in noisy environments.
Features
• Output Drive Capability: 10 LSTTL Loads
• TTL/NMOS−Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 mA
• In Compliance With the JEDEC Standard No. 7.0 A Requirements
• Chip Complexity: 72 FETs or 18 Equivalent Gates
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free and are RoHS Compliant
PIN 14 = V
CC
PIN 7 = GND
Y = A
A1
1
2
Y1
A2
3
4
Y2
A3
5
6
Y3
A4
9
8
Y4
A5
11
10
Y5
A6
13
12
Y6
LOGIC DIAGRAM
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
MARKING DIAGRAMS
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = Pb−Free Package
HCT14AG
AWLYWW
1
14
HCT
14A
ALYWG
G
1
14
(Note: Microdot may be in either location)
TSSOP−14SOIC−14 NB
TSSOP−14
DT SUFFIX
CASE 948G
SOIC−14 NB
D SUFFIX
CASE 751A
11
12
13
14
8
9
105
4
3
2
1
7
6
Y5
A5
Y6
A6
V
CC
Y4
A4
Y2
A2
Y1
A1
GND
Y3
A3
PIN ASSIGNMENT
FUNCTION TABLE
Input
A
Output
Y
L
H
H
L
MC74HCT14A
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2
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
DC Supply Voltage (Referenced to GND) −0.5 to +7.0 V
V
I
DC Input Voltage (Referenced to GND) −0.5 to V
CC
+ 0.5 V
V
O
DC Output Voltage (Referenced to GND) −0.5 to V
CC
+ 0.5 V
I
IK
DC Input Diode Current ±20 mA
I
OK
DC Output Diode Current ±25 mA
I
O
DC Output Sink Current ±25 mA
I
CC
DC Supply Current per Supply Pin ±50 mA
I
GND
DC Ground Current per Ground Pin ±50 mA
T
STG
Storage Temperature Range −65 to +150
_C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds 260
_C
T
J
Junction Temperature under Bias +150
_C
q
JA
Thermal Resistance SOIC
TSSOP
125
170
_C/W
P
D
Power Dissipation in Still Air at 85_C SOIC
TSSOP
500
450
mW
MSL Moisture Sensitivity Level 1
F
R
Flammability Rating Oxygen Index: 30% − 35% UL 94 V−0 @ 0.125 in
V
ESD
ESD Withstand Voltage Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
> 4000
> 300
> 1000
V
I
Latchup
Latchup Performance Above V
CC
and Below GND at 85_C (Note 4)
±300 mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Tested to EIA/JESD22−A114−A.
2. Tested to EIA/JESD22−A115−A.
3. Tested to JESD22−C101−A.
4. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage (Referenced to GND) 4.5 5.5 V
V
I
, V
O
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
CC
V
T
A
Operating Temperature, All Package Types −55 +125
_C
t
r
, t
f
Input Rise and Fall Time (Figure 1) − (Note 5) ns
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
5. No Limit when V
I
[ 50% V
CC
, I
CC
> 1 mA.
6. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level.
MC74HCT14A
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3
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Temperature Limit
V
CC
*55_C to 25_C v85_C v125_C
Symbol Parameter Test Conditions Volts Min Max Min Max Min Max Unit
V
T
)
max Maximum Positive−Going
Input Threshold Voltage
V
O
= 0.1 V or V
CC
– 0.1 V
|I
out
| ≤ 20 mA
4.5
5.5
1.9
2.1
1.9
2.1
1.9
2.1
V
V
T
)
min Minimum Positive−Going
Input Threshold Voltage
V
O
= 0.1 V or V
CC
– 0.1 V
|I
out
| ≤ 20 mA
4.5
5.5
1.2
1.4
1.2
1.4
1.2
1.4
V
V
T
*
max Maximum Negative−Going
Input Threshold Voltage
V
O
= 0.1 V or V
CC
– 0.1 V
|I
out
| ≤ 20 mA
4.5
5.5
1.2
1.4
1.2
1.4
1.2
1.4
V
T
*
min Minimum Negative−Going
Input Threshold Voltage
V
O
= 0.1 V or V
CC
– 0.1 V
|I
out
| ≤ 20 mA
4.5
5.5
0.5
0.6
0.5
0.6
0.5
0.6
V
H
max Maximum Hysteresis
Voltage
V
O
= 0.1 V or V
CC
– 0.1 V
|I
out
| ≤ 20 mA
4.5
5.5
1.4
1.5
1.4
1.5
1.4
1.5
V
H
min Minimum Hysteresis
Voltage
V
O
= 0.1 V or V
CC
– 0.1 V
|I
out
| ≤ 20 mA
4.5
5.5
0.4
0.4
0.4
0.4
0.4
0 4
V
OH
Minimum High−Level
Output Voltage
V
I
< V
T
*
min
|I
out
| ≤ 20 mA
4.5
5.5
4.4
5.4
4.4
5.4
4.4
5.4
V
V
I
< V
T
*
min
|I
out
| ≤ 4.0 mA
4.5 3.98 3.84 3.7
V
OL
Maximum Low−Level
Output Voltage
V
I
≥ V
T
)
max
|I
out
| ≤ 20 mA
4.5
5.5
0.1
0.1
0.1
0.1
0.1
0.1
V
V
I
≥ V
T
)
max
|I
out
| ≤ 4.0 mA
4.5 0.26 0.33 0.4
I
IK
Maximum Input
Leakage Current
V
I
= V
CC
or GND 5.5 ±0.1 ±1.0 ±1.0
mA
I
CC
Maximum Quiescent
Supply Current
(per package)
V
I
= V
CC
or GND
I
out
= 0 mA
5.5 1.0 10 40
mA
w*55_C 25_C to 125_C
DI
CC
Additional Quiescent
Supply Current
V
I
= 2.4 V, Any One Input
V
I
= V
CC
or GND, Other Inputs
l
out
= 0 mA
5.5 2.9 2.4 mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
AC CHARACTERISTICS (C
L
= 50 pF; Input t
r
= t
f
= 6.0 ns)
Guaranteed Limit
*55_C to 25_C v85_C v125_C
Symbol Parameter Test Conditions Figures Min Max Min Max Min Max Unit
t
PLH
,
t
PHL
Maximum Propagation
Delay, Input A to Output
Y (L to H)
V
CC
= 5.0 V ±10%
C
L
= 50 pF, Input t
r
= t
f
= 6.0 ns
1 & 2 32 40 48 ns
t
TLH
,
t
THL
Maximum Output
Transition Time, Any
Output
V
CC
= 5.0 V ±10%
C
L
= 50 pF, Input t
r
= t
f
= 6.0 ns
1 & 2 15 19 22 ns
Typical @ 25°C, V
CC
= 5.0 V
C
PD
Power Dissipation Capacitance, per Inverter (Note 7) 32 pF
7. Used to determine the no−load dynamic power consumption: P
D
= C
PD
V
CC
2
f + I
CC
V
CC
.
P1-P3P4-P6

NLV74HCT14ADTR2G

Mfr. #:
Buy NLV74HCT14ADTR2G
Manufacturer:
ON Semiconductor
Description:
Logic Gates HEX SCHMITT-TRIGGER
Lifecycle:
New from this manufacturer.
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