7
LTC1555/LTC1556
The LTC1555/LTC1556 perform the two primary func-
tions necessary for 3V controllers (e.g., GSM cellular
telephone controllers, smart card readers, etc.) to com-
municate with 5V SIMs or smart cards. They produce a
regulated 5V V
CC
supply for the SIM and provide level
translators for communication between the SIM and the
controller.
V
CC
Voltage Regulator
The regulator section of the LTC1555/LTC1556 (refer to
the Block Diagram) consists of a step-up/step-down charge
pump DC/DC converter. The charge pump can operate
over a wide input voltage range (2.7V to 10V) while
maintaining a regulated V
CC
output. The wide V
IN
range
enables the parts to be powered directly from a battery (if
desired) rather than from a 3V DC/DC converter output.
When V
IN
is less than the desired V
CC
the parts operate as
switched capacitor voltage doublers. When V
IN
is greater
than V
CC
the parts operate as gated switch step-down
converters. In either case, voltage conversion requires
only one small flying capacitor and output capacitor.
The V
CC
output can be programmed to either 5V or 3V via
the M0 and M1 mode pins. This feature is useful in
applications where either a 5V or 3V SIM may be used. The
charge pump V
CC
output may also be connected directly to
V
IN
if desired. When the charge pump is put into shutdown
(M0, M1 = 0), V
CC
is pulled to GND via an internal switch
to aid in proper system supply sequencing.
The soft start feature limits inrush currents upon start-up
or coming out of shutdown mode. When the SS pin is tied
to GND, the soft start feature is enabled. This limits the ef-
fective inrush current out of V
IN
to approximately 25mA
(C
OUT
= 10µF). Inrush current limiting is especially useful
when powering the LTC1555/LTC1556 from a 3V DC/DC
output since the unlimited inrush current may approach
200mA and cause voltage transients on the 3V supply. How-
ever, in cases where fast turn-on time is desired, the soft
start feature may be overridden by tying the SS pin to DV
CC
.
APPLICATIONS INFORMATION
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Capacitor Selection
For best performance, it is recommended that low ESR
(<0.5) capacitors be used for both C
IN
and C
OUT
to reduce
noise and ripple. The C
IN
and C
OUT
capacitors should be
either ceramic or tantalum and should be 10µF or greater
(ceramic capacitors will produce the smallest output ripple).
If the input source impedance is very low (< 0.5), C
IN
may
not be needed. Increasing the size of C
OUT
to 22µF or greater
will reduce output voltage ripple—particularly with high V
IN
voltages (8V or greater). A ceramic capacitor is recom-
mended for the flying capacitor C1 with a value of 0.1µF or
0.22µF.
Output Ripple
Normal LTC1555/LTC1556 operation produces voltage
ripple on the V
CC
pin. Output voltage ripple is required for
the parts to regulate. Low frequency ripple exists due to
the hysteresis in the sense comparator and propagation
delays in the charge pump enable/disable circuits. High
frequency ripple is also present mainly from the ESR
(equivalent series resistance) in the output capacitor.
Typical output ripple (V
IN
< 8V) under maximum load is
75mV peak-to-peak with a low ESR, 10µF output capaci-
tor. For applications requiring V
IN
to exceed 8V, a 22µF or
larger C
OUT
capacitor is recommended to maintain maxi-
mum ripple in the 75mV range.
The magnitude of the ripple voltage depends on several
factors. High input voltages increase the output ripple
since more charge is delivered to C
OUT
per charging cycle.
A large C1 flying capacitor (> 0.22µF) also increases ripple
in step-up mode for the same reason. Large output current
load and/or a small output capacitor (< 10µF) results in
higher ripple due to higher output voltage dV/dt. High ESR
capacitors (ESR > 0.5) on the output pin cause high
frequency voltage spikes on V
OUT
with every clock cycle.
A 10µF ceramic capacitor on the V
CC
pin should produce
acceptable levels of output voltage ripple in nearly all
applications. However, there are several ways to further
8
LTC1555/LTC1556
APPLICATIONS INFORMATION
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reduce the ripple. A larger C
OUT
capacitor (22µF or greater)
will reduce both the low and high frequency ripple due to
the lower C
OUT
charging and discharging dV/dt and the
lower ESR typically found with higher value (larger case
size) capacitors. A low ESR ceramic output capacitor will
minimize the high frequency ripple, but will not reduce the
low frequency ripple unless a high capacitance value is
chosen (10µF or greater). A reasonable compromise is to
use a 10µF to 22µF tantalum capacitor in parallel with a 1µF
to 3.3µF ceramic capacitor on V
OUT
to reduce both the low
and high frequency ripple. An RC filter may also be used
to reduce high frequency voltage spikes (see Figure 1).
hundred milliseconds to completely shut down. To ensure
prompt and proper V
CC
shutdown, always force the M0
and M1 pins to a logic low state before shutting down the
DV
CC
supply (see Figure 2). Similarly, bring the DV
CC
supply to a valid level before allowing the M0 and M1 pins
to go high when coming out of shutdown. This can be
achieved with pull-down resistors from M0 and M1 to
GND if necessary. (Note: shutting down the DV
CC
supply
with V
IN
active is not recommended with early date code
material. Consult factory for valid date code starting point
for shutting down the DV
CC
supply.)
Level Translators
All SIMs and smart cards contain a clock input, reset input
and a bidirectional data input/output. The LTC1555/
LTC1556 provide level translators to allow controllers to
communicate with the SIM (see Figures 3a and 3b). The
CLK and RST inputs to the SIM are level shifted from the
controller supply rails (DV
CC
and GND) to the SIM supply
rails (V
CC
and GND). The data input to the SIM may be
provided two different ways. The first method is to use the
DATA pin as a bidirectional level translator. This configu-
ration is only allowed if the controller data output pin is
open drain (all SIM I/O pins are open drain). Internal pull-
up resistors are provided for both the DATA pin and the
Figure 3b. Level Translator Connections for
One-Directional Controller Side DATA Flow
CIN
RIN
DATA
DDRV
DV
CC
CLK
RST
I/O
V
CC
CLK TO SIM
RST TO SIM
DATA FROM SIM
DATA TO SIM
LTC1555/LTC1556
CONTROLLER
SIDE
SIM SIDE
1555/56 F3b
Figure 3a. Level Translator Connections for
Bidirectional Controller DATA Pin
CIN
RIN
DATA
DDRV
DV
CC
CLK
RST
I/O
V
CC
CLK TO SIM
RST TO SIM
DATA TO/FROM SIM
LTC1555/LTC1556
CONTROLLER
SIDE
SIM SIDE
1555/56 F3a
Figure 2. Recommended DV
CC
Shutdown and Start-Up Timing
M0
DV
CC
0V
M1
DV
CC
0V
DV
CC
DV
CC
0V
V
CC
V
CC
0V
1555/56 F02
Shutting Down the DV
CC
Supply
To conserve power, the DV
CC
supply may be shut down
while the V
IN
supply is still active. When the DV
CC
supply
is brought to 0V, weak internal currents will force the
LTC1555/LTC1556 into shutdown mode regardless of the
voltages present on the M0 and M1 pins. However, if the
M0 and M1 pins are floating or left connected to DV
CC
as
the supply is shut down, the parts may take several
Figure 1. V
CC
Output Ripple Reduction Techniques
15µF
TANTALUM
LT1555/56 F01
V
CC
SIM
V
CC
SIM
V
CC
1µF
CERAMIC
10µF
V
CC
10µF
2
LTC1555/
LTC1556
+
9
LTC1555/LTC1556
I/O pin on the SIM side. The second method is to use the
DDRV pin to send data to the SIM and use the DATA pin to
receive data from the SIM. When the DDRV pin is not used,
it should either be left floating or tied to DV
CC
.
Level Translation with DV
CC
> V
CC
It is assumed that most applications for these parts will
use controller supply voltages (DV
CC
) less than or equal
to V
CC
. In cases where DV
CC
is greater than V
CC
by more
than 0.6V or so, the parts’ operation will be affected in the
following ways: 1) A small DC current (up to 100µA) will
flow from DV
CC
to V
CC
through the DATA pull-up resistor,
N-channel pass device and the I/O pull-up resistor
(except when the part is in shutdown at which time DV
CC
is disconnected from V
CC
by turning off the pass device).
If the V
CC
load current is less than the DV
CC
current, the
V
CC
output may be pulled out of regulation until sufficient
load current pulls V
CC
back into regulation. 2) When the
SIM is sending data back to the controller, a logic high on
the I/O pin will result in the DATA pin being pulled up to
[V
CC
+ 1/3(DV
CC
– V
CC
)], not all the way up to DV
CC
. For
example, if DV
CC
is 5V and V
CC
is 3V, the DATA pin will
only swing from 0.1V to 3.67V when receiving data
from the SIM side.
Optional LDO Output
The LTC1556 also contains an internal LDO regulator for
providing a low noise boosted supply voltage for low power
external circuitry (e.g., frequency synthesizers, etc.) Tying
the FB pin to the LDO pin provides a regulated 4.3V at the
LDO output (see Figure 4). A 3.3µF (minimum) capacitor is
APPLICATIONS INFORMATION
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U
required to ensure output stability. A 10µF low ESR capaci-
tor is recommended, however, to minimize LDO output
noise. The LDO output may also be used as an auxiliary
switch to V
CC
. If the FB pin is left floating or is tied to GND,
the LDO pin will be internally connected to the V
CC
output
through the P-channel pass device. The LDO may be dis-
abled at any time by switching the EN pin from DV
CC
to GND.
The 4.3V LDO output is usable only when V
CC
is 5V (or
greater). It is not available when V
CC
= 3V.
Figure 4. Auxiliary LDO Connections (LTC1556 Only)
V
REF
61k
V
CC
= 5V
1µA
LDO
OFF ON
10µF
TANT
4.3V
1555/56 F04
I
LDO
0mA to
10mA
FB
153k
EN
+
+
10kV ESD Protection
All pins that connect to the SIM (CLK, RST, I/O, V
CC
, GND)
withstand over 10kV of human body model (100pF/1.5k)
ESD. In order to ensure proper ESD protection, careful
board layout is required. The GND pins should be tied
directly to a GND plane. The V
CC
capacitor should be
located very close to the V
CC
pin and tied immediately to
the GND plane.

LTC1555IGN

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators LTC1555 - SIM Power Supplyand Level Translator
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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