AD8253 Data Sheet
Rev. B | Page 6 of 24
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage ±17 V
Power Dissipation See Figure 4
Output Short-Circuit Current Indefinite
1
Common-Mode Input Voltage ±V
S
Differential Input Voltage ±V
S
Digital Logic Inputs ±V
S
Storage Temperature Range –65°C to +125°C
Operating Temperature Range
2
–40°C to +85°C
Lead Temperature (Soldering 10 sec) 300°C
Junction Temperature 140°C
θ
JA
(4-Layer JEDEC Standard Board) 112°C/W
Package Glass Transition Temperature 140°C
1
Assumes the load is referenced to midsupply.
2
Temperature for specified performance is −40°C to +85°C. For performance
to +125°C, see the Typical Performance Characteristics section.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8253 package is
limited by the associated rise in junction temperature (T
J
) on
the die. The plastic encapsulating the die locally reaches the
junction temperature. At approximately 140°C, which is the
glass transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit can change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the AD8253. Exceeding
a junction temperature of 140°C for an extended period can
result in changes in silicon devices, potentially causing failure.
The still-air thermal properties of the package and PCB (θ
JA
),
the ambient temperature (T
A
), and the total power dissipated in
the package (P
D
) determine the junction temperature of the die.
The junction temperature is calculated as
JA
D
A
J
θPTT
The power dissipated in the package (P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
S
) times the
quiescent current (I
S
). Assuming the load (R
L
) is referenced to
midsupply, the total drive power is V
S
/2 × I
OUT
, some of which is
dissipated in the package and some of which is dissipated in the
load (V
OUT
× I
OUT
).
The difference between the total drive power and the load
power is the drive power dissipated in the package.
P
D
= Quiescent Power + (Total Drive Power − Load Power)
L
2
OUT
L
OUTS
SS
D
R
V
–
R
V
2
V
IVP
In single-supply operation with R
L
referenced to −V
S
, the worst
case is V
OUT
= V
S
/2.
Airflow increases heat dissipation, effectively reducing θ
JA
. In
addition, more metal directly in contact with the package leads
from metal traces through holes, ground, and power planes
reduces the θ
JA
.
Figure 4 shows the maximum safe power dissipation in the
package vs. the ambient temperature on a 4-layer JEDEC
standard board.
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
–40 –20 120100806040200
MAXIMUM POWER DISSIPATION (W)
AMBIENT TEMPERATURE (°C)
06983-004
Figure 4. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION
