ICS840N051BGI REVISION A OCTOBER 14, 2013 10 ©2013 Integrated Device Technology, Inc.
ICS840N051I Data Sheet FEMTOCLOCK® NG CRYSTAL-TO-LVCMOS/LVTTL CLOCK SYNTHESIZER
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS840N051I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS840N051I is the sum of the core power plus the analog power plus the power dissipated into the load.
The following is the power dissipation for V
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
• Power (core)
MAX
= V
DD_MAX
* (I
DD
+ I
DDA
) = 3.465V *(67mA + 18mA) = 294.53mW
• Output Impedance R
OUT
Current due to Loading 50 to V
DD
/2
Output Current I
OUT
= V
DD_MAX
/ [2 * (50 + R
OUT
)] = 3.465V / [2 * (50 + 15)] = 26.7mA
• Power Dissipation on the R
OUT
per LVCMOS output
Power (R
OUT
) = R
OUT
* (I
OUT
)
2
= 15 * (26.7mA)
2
= 10.7mW per output
• Total Power (R
OUT
) = 10.7mW * 1 = 10.7mW
Dynamic Power Dissipation at 156.25MHz
Power (156.25MHz) = C
PD
* Frequency * (V
DD
)
2
= 11pF * 156.25MHz * (3.465V)
2
= 20.64mW per output
Total Power (156.25MHz) = 20.64mW * 1 = 20.64mW
Total Power Dissipation
• Total Power
= Power (core)
MAX
+ Power (R
OUT
) + Power (156.25MHz)
= 294.53mW + 10.7mW + 20.64mW
= 325.87mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
JA
* Pd_total + T
A
Tj = Junction Temperature
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance q
JA
must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 117°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.326W *117°C/W = 123.2°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance
JA
for 8 Lead TSSOP, Forced Convection
JA
by Velocity
Meters per Second 0
Multi-Layer PCB, JEDEC Standard Test Boards 117°C/W
