LTC3026-1
7
30261f
+
+
+
SHDN
0.4V
REFERENCE
6
7
5
8
UVLO
1,2
IN
OUT
BIAS
SHDN
ADJ
PG
4
GNDS
9,10
0.372V
30261 BD
GND
3, 11
+
OVERSHOOT DETECT
V
OFF
BLOCK DIAGRAM
LTC3026-1
8
30261f
The LTC3026-1 is a VLDO (very low dropout) linear regula-
tor which operates from input voltages as low as 1.14V.
The LDO uses an internal NMOS transistor as the pass
device in a source-follower configuration. The BIAS pin
provides the higher supply necessary for the LDO circuitry
while the output current comes directly from the IN input
for high efficiency regulation.
The LTC3026-1 is the same as the LTC3026 but has the
boost converter disabled. The SW pin of the LTC3026
has been replaced with a GNDS pin. Because the boost
converter is disabled, an external 5V supply must be pres-
ent to drive the BIAS pin (formally BST on the LTC3026).
LDO Operation
An undervoltage lockout comparator (UVLO) senses the
BIAS pin voltage to ensure that the bias supply for the LDO
is greater than 4.2V before enabling the LDO. If BIAS is
below 4.2V, the UVLO shuts down the LDO, and OUT is
pulled to GND through the external divider.
The LDO provides a high accuracy output capable of sup-
plying 1.5A of output current with a typical dropout voltage
of only 100mV. A single ceramic capacitor as small as 10μF
is all that is required for output bypassing. A low reference
voltage allows the LTC3026-1 output to be programmed
to much lower voltages than available in common LDOs
(range of 0.4V to 2.6V).
The devices also include current limit and thermal overload
protection, and will survive an output short-circuit indefi-
nitely. The fast transient response of the follower output
stage overcomes the traditional trade-off between dropout
voltage, quiescent current and load transient response
inherent in most LDO regulator architectures, see Figure 1.
The LTC3026-1 also includes a soft-start feature to prevent
excessive current flow at V
IN
during start-up. When the
LDO is enabled, the soft-start circuitry gradually increases
the LDO reference voltage from 0V to 0.4V over a period
of approximately 200μs, see Figure 2.
Adjustable Output Voltage
The output voltage is set by the ratio of two external resis-
tors as shown in Figure 3. The device servos the output
to maintain the ADJ pin voltage at 0.4V (referenced to
ground). Thus, the current in R1 is equal to 0.4V/R1. For
good transient response, stability and accuracy the current
in R1 should be at least 80μA, thus, the value of R1 should
be no greater than 5k. The current in R2 is the current in
R1 plus the ADJ pin bias current. Since the ADJ pin bias
current is typically <10nA it can be ignored in the output
voltage calculation. The output voltage can be calculated
using the formula in Figure 3. Note that in shutdown the
output is turned off and the divider current will be zero
once C
OUT
is discharged.
OPERATION
Figure 1. Output Load Step Response
Figure 2. Soft-Start with Boost Disable
I
OUT
1.5A
0mA
OUT
AC 20mV/DIV
100μs/DIV
V
OUT
= 1.5V
C
OUT
= 10μF
V
IN
= 1.7V
V
BIAS
= 5V
30261 F01
SHDN
OUT
PG
HI
LO
100μs/DIV
T
A
= 25°C
R
OUT
= 1Ω
V
IN
= 1.7V
V
BIAS
= 5V
1.5V
1.5V
0V
0V
30261 F02
LTC3026-1
9
30261f
OPERATION
The LTC3026-1 operates at a relatively high gain of
270μV/A referred to the ADJ input. Thus, a load current
change of 1mA to 1.5A produces a 400μV drop at the ADJ
input. To calculate the change in the output, simply mul-
tiply by the gain of the feedback network (i.e. 1 + R2/R1).
For example, to program the output for 1.2V choose
R2/R1 = 2. In this example an output current change of
1mA to 1.5A produces –400μV • (1 + 2) = 1.2mV drop at
the output.
Power Good Operation
The LTC3026-1 includes an open-drain power good (PG)
output pin with hysteresis. If the chip is in shutdown or
under UVLO conditions (V
BIAS
< 4.25V typ.), PG is low
impedance to ground. PG becomes high impedance when
V
OUT
rises to 93% of its regulation voltage. PG stays high
impedance until V
OUT
falls back down to 91% of its regula-
tion value. A pull-up resistor can be inserted between PG
and a positive logic supply (such as IN, OUT, BIAS, etc.)
to signal a valid power good condition. V
IN
should be the
minimum operating voltage (1.14V) or greater for PG to
function correctly.
Output Capacitance and Transient Response
The LTC3026-1 is designed to be stable with a wide range
of ceramic output capacitors. The ESR of the output
capacitor affects stability, most notably with small ca-
pacitors. An output capacitor of 10μF or greater with an
ESR of 0.05Ω or less is recommended to ensure stability.
The LTC3026-1 is a micropower device and output tran-
sient response will be a function of output capacitance.
Larger values of output capacitance decrease the peak
deviations and provide improved transient response for
larger load current changes. Note that bypass capacitors
used to decouple individual components powered by the
Figure 3. Programming the LTC3026-1
LTC3026-1 will increase the effective output capacitor
value. High ESR tantalum and electrolytic capacitors may
be used, but a low ESR ceramic capacitor must be in paral-
lel at the output. There is no minimum ESR or maximum
capacitor size requirements.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common di-
electrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but exhibit strong voltage and tem-
perature coefficients as shown in Figures 4 and 5. When
used with a 2V regulator, a 10μF Y5V capacitor can exhibit
an effective value as low as 1μF to 2μF over the operating
temperature range. The X5R and X7R dielectrics result in
V
OUT
ADJ
GND
C
OUT
R2
R1
LTC3026-1
30261 F03
V
OUT
= 0.4V 1+
R2
R1
Figure 4. Ceramic Capacitor DC Bias Characteristics
Figure 5. Ceramic Capacitor Temperature Characteristics
DC BIAS VOLTAGE (V)
CHANGE IN VALUE (%)
30261 F04
20
0
–20
–40
–60
–80
–100
X5R
Y5V
BOTH CAPACITORS ARE 10μF,
6.3V, 0805 CASE SIZE
0123456
TEMPERATURE (°C)
–50
20
0
–20
–40
–60
–80
–100
25 75
30261 F05
–25 0
50
Y5V
CHANGE IN VALUE (%)
X5R
BOTH CAPACITORS ARE 10μF,
6.3V, 0805 CASE SIZE

LTC3026EMSE-1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators 1.5A VLDO in DFN (3x3)
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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