4
COMMERCIAL TEMPERATURE RANGE
IDTCSPUA877A
1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER
PIN DESCRIPTION (VFBGA)
Pin Name Pin Number Description
AGND G1 Ground for 1.8V analog supply
AVDD H1 1.8V analog supply
CLK, CLK E1, F1 Differential clock input with a 10KΩ to 100KΩ pulldown resistor
FBIN, FBIN E6, F6 Feedback differential clock input
FBOUT, FBOUT G6, H6 Feedback differential clock output
GND B2 - B5, C2, C5, H2, H5, J2 - J5 Ground
VDDQ D2 - D4, E2, E5, F2, G2 - G5 1.8V supply
O E F5 Output Enable
OS D5 Output Select (tied to GND or VDDQ)
Y[0:9] A3, A4, B1, B6, C1, C6, K1, K2, K5, K6 Buffered output of input clock, CLK
Y[0:9] A1, A2, A5, A6, D1, D6, J1, J6, K3, K4 Buffered output of input clock, CLK
NB No Ball
PIN DESCRIPTION (VFQFPN)
Pin Name Pin Number Description
AGND 7 Ground for 1.8V analog supply
AVDD 8 1.8V analog supply
CLK, CLK 4, 5 Differential clock input with a 10KΩ to 100KΩ pulldown resistor
FBIN, FBIN 26, 27 Feedback differential clock input
FBOUT, FBOUT 24, 25 Feedback differential clock output
GND 10 Ground
VDDQ 1, 6, 9, 15, 20, 23, 28, 31, 36 1.8V supply
O E 22 Output Enable
OS 21 Output Select (tied to GND or VDDQ)
Y[0:9] 3, 11, 14, 16, 19, 29, 33, 34, 38, 39 Buffered output of input clock, CLK
Y[0:9] 2, 12, 13, 17, 18, 30, 32, 35, 37, 40 Buffered output of input clock, CLK
NB No Ball