PCA9530D,118 Datasheet PCA9530D,118, PCA9530DP,118, PCA9530D,112 | P4-P6

Product data sheet Rev. 03 — 26 February 2009 4 of 24

NXP Semiconductors

PCA9530

2-bit I

C-bus LED dimmer

The last bit of the address byte deﬁnes the operation to be performed. When set to logic 1

a read is selected, while a logic 0 selects a write operation.

6.2 Control register

Following the successful acknowledgement of the slave address, the bus master will send

a byte to the PCA9530, which will be stored in the Control register.

The lowest 3 bits are used as a pointer to determine which register will be accessed.

If the Auto-Increment ﬂag is set, the three low order bits of the Control register are

automatically incremented after a read or write. This allows the user to program the

registers sequentially. The contents of these bits will rollover to ‘000’ after the last register

is accessed.

When Auto-Increment ﬂag is set (AI = 1) and a read sequence is initiated, the sequence

must start by reading a register different from the Input register (B2 B1 B0 ≠ 0 0 0).

Only the 3 least signiﬁcant bits are affected by the AI ﬂag. Unused bits must be

programmed with zeroes.

6.2.1 Control register deﬁnition

Reset state: 00h

Fig 5. Control register

002aae500

0 0 0 AI 0 B2 B1 B0

Auto-Increment flag

Table 3. Register summary

B2 B1 B0 Symbol Access Description

0 0 0 INPUT read only input register

0 0 1 PSC0 read/write frequency prescaler 0

0 1 0 PWM0 read/write PWM register 0

0 1 1 PSC1 read/write frequency prescaler 1

1 0 0 PWM1 read/write PWM register 1

1 0 1 LS0 read/write LED selector

Product data sheet Rev. 03 — 26 February 2009 5 of 24

NXP Semiconductors

PCA9530

2-bit I

C-bus LED dimmer

6.3 Register descriptions

6.3.1 INPUT - Input register

The INPUT register reﬂects the state of the device pins. Writes to this register will be

acknowledged but will have no effect.

Remark: The default value ‘X’ is determined by the externally applied logic level (normally

logic 1) when used for directly driving LED with pull-up to V

6.3.2 PCS0 - Frequency Prescaler 0

PSC0 is used to program the period of the PWM output.

The period of BLINK0 = (PSC0 + 1) / 152.

6.3.3 PWM0 - Pulse Width Modulation 0

The PWM0 register determines the duty cycle of BLINK0. The outputs are LOW (LED on)

when the count is less than the value in PWM0 and HIGH (LED off) when it is greater. If

PWM0 is programmed with 00h, then the PWM0 output is always HIGH (LED off).

The duty cycle of BLINK0 = PWM0 / 256.

6.3.4 PCS1 - Frequency Prescaler 1

PSC1 is used to program the period of the PWM output.

The period of BLINK1 = (PSC1 + 1) / 152.

Table 4. INPUT - Input register description

Bit 7 6 5 4 3 2 1 0

Symbol ------LED1 LED0

Default 000000XX

Table 5. PSC0 - Frequency Prescaler 0 register description

Bit 7 6 5 4 3 2 1 0

Symbol PSC0[7] PSC0[6] PSC0[5] PSC0[4] PSC0[3] PSC0[2] PSC0[1] PSC0[0]

Default 00000000

Table 6. PWM0 - Pulse Width Modulation 0 register description

Bit 7 6 5 4 3 2 1 0

Symbol PWM0

[7]

PWM0

[6]

PWM0

[5]

PWM0

[4]

PWM0

[3]

PWM0

[2]

PWM0

[1]

PWM0

[0]

Default 10000000

Table 7. PSC1 - Frequency Prescaler 1 register description

Bit 7 6 5 4 3 2 1 0

Symbol PSC1[7] PSC1[6] PSC1[5] PSC1[4] PSC1[3] PSC1[2] PSC1[1] PSC1[0]

Default 00000000

Product data sheet Rev. 03 — 26 February 2009 6 of 24

NXP Semiconductors

PCA9530

2-bit I

C-bus LED dimmer

6.3.5 PWM1 - Pulse Width Modulation 1

The PWM1 register determines the duty cycle of BLINK1. The outputs are LOW (LED on)

when the count is less than the value in PWM1 and HIGH (LED off) when it is greater.

If PWM1 is programmed with 00h, then the PWM1 output is always HIGH (LED off).

The duty cycle of BLINK1 = PWM1 / 256.

6.3.6 LS0 - LED selector

The LS0 LED select register determines the source of the LED data.

00 = output is set high-impedance (LED off; default)

01 = output is set LOW (LED on)

10 = output blinks at PWM0 rate

11 = output blinks at PWM1 rate

6.4 Pins used as GPIOs

LEDn pins not used to control LEDs can be used as General Purpose I/Os (GPIOs).

For use as input, set LEDn to high-impedance (00) and then read the pin state via the

INPUT register.

For use as output, connect external pull-up resistor to the pin and size it according to the

DC recommended operating characteristics. LEDn output pin is HIGH when the output is

programmed as high-impedance, and LOW when the output is programmed LOW through

the ‘LED selector’ register LS0. The output can be pulse-width controlled when PWM0 or

PWM1 are used.

6.5 Power-on reset

When power is applied to V

, an internal Power-On Reset (POR) holds the PCA9530 in

a reset condition until V

has reached V

POR

. At that point, the reset condition is released

and the PCA9530 registers are initialized to their default states, all the outputs in the

OFF state. Thereafter, V

must be lowered below 0.2 V to reset the device.

Table 8. PWM1 - Pulse Width Modulation 1 register description

Bit 7 6 5 4 3 2 1 0

Symbol PWM1

[7]

PWM1

[6]

PWM1

[5]

PWM1

[4]

PWM1

[3]

PWM1

[2]

PWM1

[1]

PWM1

[0]

Default 10000000

Table 9. LS0 - LED selector register bit description

Legend: * default value.

LS0 7:4 1111* reserved

3:2 00* LED1 selected

1:0 00* LED0 selected

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24

PCA9530D,118

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PCA9530D,118

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