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74ALVC162374T

P1-P3P4-P6
© 2001 Fairchild Semiconductor Corporation DS500688 www.fairchildsemi.com
October 2001
Revised October 2001
74ALVC162374 Low Voltage 16-Bit D-Type Flip-Flop
74ALVC162374
Low Voltage 16-Bit D-Type Flip-Flop
with 3.6V Tolerant Inputs and Outputs
and 26
Ω Series Resistors in Outputs
General Description
The ALVC162374 contains sixteen non-inverting D-type
flip-flops with 3-STATE outputs and is intended for bus ori-
ented applications. The device is byte controlled. A buff-
ered clock (CP) and output enable (OE
) are common to
each byte and can be shorted together for full 16-bit opera-
tion.
The ALVC162374 is also designed with 26
Ω series resis-
tors in the outputs. This design reduces line noise in appli-
cations such as memory address drivers, clock drivers and
bus transceivers/transmitters.
The 74ALVC162374 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The 74ALVC162374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
■ 1.65V–3.6V V
CC
supply operation
■ 3.6V tolerant inputs and outputs
■ 26
Ω series resistors in outputs
■ t
PD
(CLK to O
n
)
3.9 ns max for 3.0V to 3.6V V
CC
5.3 ns max for 2.3V to 2.7V V
CC
9.6 ns max for 1.65V to 1.95V V
CC
■ Power-off high impedance inputs and outputs
■ Supports live insertion and withdrawal (Note 1)
■ Uses patented noise/EMI reduction circuitry
■ Latchup conforms to JEDEC JED78
■ ESD performance:
Human body model
> 2000V
Machine model
> 200V
Note 1: To ensure the high-impedance state during power up or power
down, OE
should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol Pin Descriptions
Order Number Package Number Package Descriptions
74ALVC162374T MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Input (Active LOW)
CP
n
Clock Pulse Input
I
0
–I
15
Inputs
O
0
–O
15
Outputs
www.fairchildsemi.com 2
74ALVC162374
Connection Diagram Truth Tables
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = High Impedance
O
0
= Previous O
0
before HIGH-to-LOW of CP
Functional Description
The 74ALVC162374 consists of sixteen edge-triggered flip-
flops with individual D-type inputs and 3-STATE true out-
puts. The device is byte controlled with each byte function-
ing identically, but independent of the other. The control
pins can be shorted together to obtain full 16-bit operation.
Each clock has a buffered clock and buffered Output
Enable common to all flip-flops within that byte. The
description which follows applies to each byte. Each flip-
flop will store the state of their individual I inputs that meet
the setup and hold time requirements on the LOW-to-HIGH
Clock (CP
n
) transition. With the Output Enable (OE
n
) LOW,
the contents of the flip-flops are available at the outputs.
When OE
n
is HIGH, the outputs go to the high impedance
state. Operations of the OE
n
input does not affect the state
of the flip-flops.
Logic Diagram
Byte 1 (0:7)
Byte 2 (8:15)
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs Outputs
CP
1
OE
1
I
0
–I
7
O
0
–O
7
LHH
LLL
LLXO
0
XHXZ
Inputs Outputs
CP
2
OE
2
I
8
–I
15
O
8
–O
15
LHH
LLL
LLXO
0
XHXZ
3 www.fairchildsemi.com
74ALVC162374
Absolute Maximum Ratings(Note 2) Recommended Operating
Conditions
(Note 4)
Note 2: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat-
ings. The “Recommended Operating Conditions” table will define the condi-
tions for actual device operation.
Note 3: I
O
Absolute Maximum Rating must be observed.
Note 4: Floating or unused control inputs must be held HIGH or LOW.
DC Electrical Characteristics
Supply Voltage (V
CC
) −0.5V to +4.6V
DC Input Voltage (V
I
) −0.5V to 4.6V
Output Voltage (V
O
) (Note 3) −0.5V to V
CC
+0.5V
DC Input Diode Current (I
IK
)
V
I
< 0V −50 mA
DC Output Diode Current (I
OK
)
V
O
< 0V −50 mA
DC Output Source/Sink Current
(I
OH
/I
OL
) ±50 mA
DC V
CC
or GND Current per
Supply Pin (I
CC
or GND) ±100 mA
Storage Temperature Range (T
STG
) −65°C to +150°C
Power Supply
Operating 1.65V to 3.6V
Input Voltage 0V to V
CC
Output Voltage (V
O
)0V to V
CC
Free Air Operating Temperature (T
A
) −40°C to +85°C
Minimum Input Edge Rate (
∆t/∆V)
V
IN
= 0.8V to 2.0V, V
CC
= 3.0V 10 ns/V
Symbol Parameter Conditions
V
CC
Min Max Units
(V)
V
IH
HIGH Level Input Voltage 1.65 - 1.95 0.65 x V
CC
V2.3 - 2.7 1.7
2.7 - 3.6 2.0
V
IL
LOW Level Input Voltage 1.65 - 1.95 0.35 x V
CC
V2.3 - 2.7 0.7
2.7 - 3.6 0.8
V
OH
HIGH Level Output Voltage I
OH
= −100 µA 1.65 - 3.6 V
CC
- 0.2
V
I
OH
= −2 mA 1.65 1.2
I
OH
= −4 mA 2.3 1.9
I
OH
= −6 mA 2.3 1.7
32.4
I
OH
= −8 mA 2.7 2
I
OH
= −12 mA 3.0 2
V
OL
LOW Level Output Voltage I
OL
= 100 µA 1.65 - 3.6 0.2
V
I
OL
= 2 mA 1.65 0.45
I
OL
= 4 mA 2.3 0.4
I
OL
= 6 mA 2.3 0.55
30.55
I
OL
= 8 mA 2.7 0.6
I
OL
= 12 mA 3 0.8
I
I
Input Leakage Current 0 ≤ V
I
≤ 3.6V 3.6 ±5.0 µA
I
OZ
3-STATE Output Leakage 0 ≤ V
O
≤ 3.6V 3.6 ±10 µA
I
CC
Quiescent Supply Current V
I
= V
CC
or GND, I
O
= 0 3.6 40 µA
∆I
CC
Increase in I
CC
per Input V
IH
= V
CC
− 0.6V 3 - 3.6 750 µA
P1-P3P4-P6

74ALVC162374T

Mfr. #:
Buy 74ALVC162374T
Manufacturer:
ON Semiconductor / Fairchild
Description:
Flip Flops 16-Bit D-Type Flip-F
Lifecycle:
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