L5973AD Functional description
Doc ID 9552 Rev 9 11/22
4.6 PWM comparator and power stage
This block compares the oscillator sawtooth and the error amplifier output signals
generating the PWM signal for the driving stage. The power stage is a very critical block
cause it has to guarantee a correct turn on and turn OFF of the PDMOS. The turn ON of the
power element, or better, the rise time of the current at turn on, is a very critical parameter to
compromise.
At a first approach, it looks like the faster it is the rise time, the lower are the turn on losses.
But there is a limit introduced by the recovery time of the recirculation diode. In fact when the
current of the power element equals the inductor current, the diode turns off and the drain of
the power is free to go high. But during its recovery time, the diode can be considered as an
high value capacitor and this produces a very high peak current, responsible of many
problems:
● Spikes on the device supply voltage that cause oscillations (and thus noise) due to the
board parasitic.
● Turn ON overcurrent causing a decrease of the efficiency and system reliability.
● Big EMI problems.
● Shorter freewheeling diode life.
The fall time of the current during the turn off is also critical. In fact it produces voltage
spikes (due to the parasites elements of the board) that increase the voltage drop across the
PDMOS.
In order to minimize all these problems, a new topology of driving circuit has been used and
its block diagram is shown in Figure 7.
The basic idea is to change the current levels used to turn on and off the power switch,
according with the PDMOS status and with the gate clamp status.
This circuitry allow to turn off and on quickly the power switch and to manage the above
question related to the freewheeling diode recovery time problem.
The gate clamp is necessary to avoid that Vgs of the internal switch goes higher than
Vgsmax. The ON/OFF Control block avoids any cross conduction between the supply line
and ground.
