© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 6
1 Publication Order Number:
NVMFD5852NL/D
NVMFD5852NL
Power MOSFET
40 V, 6.9 mW, 44 A, Dual N−Channel Logic
Level, Dual SO−8FL
Features
• Small Footprint (5x6 mm) for Compact Designs
• Low R
DS(on)
to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• NVMFD5852NLWF − Wettable Flanks Option for Enhanced Optical
Inspection
• AEC−Q101 Qualified and PPAP Capable
• This is a Pb−Free Device
MAXIMUM RATINGS (T
J
= 25°C unless otherwise noted)
Parameter
Symbol Value Unit
Drain−to−Source Voltage V
DSS
40 V
Gate−to−Source Voltage V
GS
"20 V
Continuous Drain Cur
rent R
Y
J−mb
(Notes 1,
2, 3, 4)
Steady
State
T
mb
= 25°C
I
D
44
A
T
mb
= 100°C 31
Power Dissipation
R
Y
J−mb
(Notes 1, 2, 3
T
mb
= 25°C
P
D
27
W
T
mb
= 100°C 13
Continuous Drain Cur
rent R
q
JA
(Notes 1, 3
& 4)
Steady
State
T
A
= 25°C
I
D
15
A
T
A
= 100°C 10.6
Power Dissipation
R
q
JA
(Notes 1 & 3)
T
A
= 25°C
P
D
3.2
W
T
A
= 100°C 1.6
Pulsed Drain Current
T
A
= 25°C, t
p
= 10 ms
I
DM
329 A
Operating Junction and Storage Temperature T
J
, T
stg
−55 to
175
°C
Source Current (Body Diode) I
S
40 A
Single Pulse Drain−to−Source Avalanche
Energy (T
J
= 25°C, V
GS
= 10 V, I
L(pk)
= 40 A,
L = 0.1 mH, R
G
= 25 W)
E
AS
80 mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter
Symbol Value Unit
Junction−to−Mounting Board (top) − Steady
State (Notes 2, 3)
R
Y
J−mb
5.6
°C/W
Junction−to−Ambient − Steady State (Note 3) R
q
JA
47
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second are higher but are dependent
on pulse duration and duty cycle.
ORDERING INFORMATION
http://onsemi.com
Device Package Shipping
†
V
(BR)DSS
R
DS(on)
MAX I
D
MAX
40 V
6.9 mW @ 10 V
44 A
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
DFN8 5x6
(SO8FL)
CASE 506BT
MARKING DIAGRAM
12.0 mW @ 4.5 V
NVMFD5852NLT1G DFN8
(Pb−Free)
1500 / Tape &
Reel
5852NL = Specific Device Code
for NVMFD5852NL
5852LW = Specific Device Code
for NVMFD5852NLWF
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
D1
D1
D2
D2
S1
G1
S2
G2
Dual N−Channel
D1
S1
G1
5852xx
AYWZZ
1
D2
D1
D2
S2
G2
D2
D1
NVMFD5852NLWFT1G DFN8
(Pb−Free)
1500 / Tape &
Reel
