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LTC3787HGN#TRPBF

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LTC3787
22
3787fc
APPLICATIONS INFORMATION
EXTV
CC
remains above 4.55V. The EXTV
CC
LDO attempts
to regulate the INTV
CC
voltage to 5.4V, so while EXTV
CC
is less than 5.4V, the LDO is in dropout and the INTV
CC
voltage is approximately equal to EXTV
CC
. When EXTV
CC
is greater than 5.4V, up to an absolute maximum of 6V,
INTV
CC
is regulated to 5.4V.
Significant thermal gains can be realized by powering
INTV
CC
from an external supply. Tying the EXTV
CC
pin
to a 5V supply reduces the junction temperature in the
previous example from 125°C to 79°C in a QFN package:
T
J
= 70°C + (32mA)(5V)(43°C/W) = 77°C
and from 125°C to 74°C in an SSOP package:
T
J
= 70°C + (15mA)(5V)(90°C/W) = 77°C
If more current is required through the EXTV
CC
LDO than
is specified, an external Schottky diode can be added be-
tween the EXTV
CC
and INTV
CC
pins. Make sure that in all
cases EXTV
CC
≤ VBIAS (even at start-up and shutdown).
The following list summarizes possible connections for
EXTV
CC
:
EXTV
CC
Grounded. This will cause INTV
CC
to be powered
from the internal 5.4V regulator resulting in an efficiency
penalty at high input voltages.
EXTV
CC
Connected to an External Supply. If an external
supply is available in the 5V to 6V range, it may be used
to provide power. Ensure that EXTV
CC
is always lower
than VBIAS.
Topside MOSFET Driver Supply (C
B
, D
B
)
External bootstrap capacitors C
B
connected to the BOOST
pins supply the gate drive voltages for the topside
MOSFETs. Capacitor C
B
in the Block Diagram is charged
though external diode D
B
from INTV
CC
when the SW pin
is low. When one of the topside MOSFETs is to be turned
on, the driver places the C
B
voltage across the gate and
source of the desired MOSFET. This enhances the MOSFET
and turns on the topside switch. The switch node volt-
age, SW, rises to V
OUT
and the BOOST pin follows. With
the topside MOSFET on, the boost voltage is above the
output voltage: V
BOOST
= V
OUT
+ V
INTVCC
. The value of
the boost capacitor C
B
needs to be 100 times that of the
total input capacitance of the topside MOSFET(s). The
reverse breakdown of the external Schottky diode must
be greater than V
OUT(MAX)
.
The external diode D
B
can be a Schottky diode or silicon
diode, but in either case it should have low leakage and fast
recovery. Pay close attention to the reverse leakage at high
temperatures where it generally increases substantially.
Each of the topside MOSFET drivers includes an internal
charge pump that delivers current to the bootstrap capaci-
tor from the BOOST pin. This charge current maintains
the bias voltage required to keep the top MOSFET on
continuously during dropout/overvoltage conditions. The
Schottky/silicon diodes selected for the topside drivers
should have a reverse leakage less than the available output
current the charge pump can supply. Curves displaying
the available charge pump current under different operat-
ing conditions can be found in the Typical Performance
Characteristics section.
A leaky diode D
B
in the boost converter can not only
prevent the top MOSFET from fully turning on but it can
also completely discharge the bootstrap capacitor C
B
and
create a current path from the input voltage to the BOOST
pin to INTV
CC
. This can cause INTV
CC
to rise if the diode
leakage exceeds the current consumption on INTV
CC
.
This is particularly a concern in Burst Mode operation
where the load on INTV
CC
can be very small. The external
Schottky or silicon diode should be carefully chosen such
that INTV
CC
never gets charged up much higher than its
normal regulation voltage.
Fault Conditions: Overtemperature Protection
At higher temperatures, or in cases where the internal
power dissipation causes excessive self heating on-chip
(such as an INTV
CC
short to ground), the overtemperature
shutdown circuitry will shut down the LTC3787. When the
junction temperature exceeds approximately 170°C, the
overtemperature circuitry disables the INTV
CC
LDO, causing
the INTV
CC
supply to collapse and effectively shut down
LTC3787
23
3787fc
APPLICATIONS INFORMATION
the entire LTC3787 chip. Once the junction temperature
drops back to approximately 155°C, the INTV
CC
LDO turns
back on. Long term overstress (T
J
> 125°C) should be
avoided as it can degrade the performance or shorten
the life of the part.
Since the shutdown may occur at full load, beware that
the load current will result in high power dissipation in
the body diodes of the top MOSFETs. In this case, PGOOD
output may be used to turn the system load off.
Phase-Locked Loop and Frequency Synchronization
The LTC3787 has an internal phase-locked loop (PLL)
comprised of a phase frequency detector, a lowpass filter
and a voltage-controlled oscillator (VCO). This allows the
turn-on of the bottom MOSFET of channel 1 to be locked
to the rising edge of an external clock signal applied to
the PLLIN/MODE pin. The turn-on of channel 2’s bot-
tom MOSFET is thus 180 degrees out-of-phase with the
external clock. The phase detector is an edge-sensitive
digital type that provides zero degrees phase shift between
the external and internal oscillators. This type of phase
detector does not exhibit false lock to harmonics of the
external clock.
If the external clock frequency is greater than the internal
oscillator’s frequency, f
OSC
, then current is sourced continu-
ously from the phase detector output, pulling up the VCO
input. When the external clock frequency is less than f
OSC
,
current is sunk continuously, pulling down the VCO input.
If the external and internal frequencies are the same but
exhibit a phase difference, the current sources turn on for
an amount of time corresponding to the phase difference.
The voltage at the VCO input is adjusted until the phase
and frequency of the internal and external oscillators are
identical. At the stable operating point, the phase detector
output is high impedance and the internal filter capacitor,
C
LP
, holds the voltage at the VCO input.
Typically, the external clock (on the PLLIN/MODE pin) input
high threshold is 1.6V, while the input low threshold is 1.2V.
Note that the LTC3787 can only be synchronized to an
external clock whose frequency is within range of the
LTC3787’s internal VCO, which is nominally 55kHz to
1MHz. This is guaranteed to be between 75kHz and 850kHz.
Rapid phase locking can be achieved by using the FREQ pin
to set a free-running frequency near the desired synchro-
nization frequency. The VCO’s input voltage is prebiased
at a frequency corresponding to the frequency set by the
FREQ pin. Once prebiased, the PLL only needs to adjust
the frequency slightly to achieve phase lock and synchro-
nization. Although it is not required that the free-running
frequency be near external clock frequency, doing so will
prevent the operating frequency from passing through a
large range of frequencies as the PLL locks.
Figure 7. Relationship Between Oscillator
Frequency and Resistor Value at the FREQ Pin
FREQ PIN RESISTOR (k)
15
FREQUENCY (kHz)
600
800
1000
35 45 5525
3787 F07
400
200
500
700
900
300
100
0
65 75 85 95 105 115
125
LTC3787
24
3787fc
APPLICATIONS INFORMATION
Table 2 summarizes the different states in which the FREQ
pin can be used.
Table 2.
FREQ PIN PLLIN/MODE PIN FREQUENCY
0V DC Voltage 350kHz
INTV
CC
DC Voltage 535kHz
Resistor DC Voltage 50kHz to 900kHz
Any of the Above External Clock Phase Locked to
External Clock
Minimum On-Time Considerations
Minimum on-time, t
ON(MIN)
, is the smallest time duration
that the LTC3787 is capable of turning on the bottom
MOSFET. It is determined by internal timing delays and
the gate charge required to turn on the top MOSFET. Low
duty cycle applications may approach this minimum on-
time limit.
In forced continuous mode, if the duty cycle falls below
what can be accommodated by the minimum on-time,
the controller will begin to skip cycles but the output will
continue to be regulated. More cycles will be skipped when
V
IN
increases. Once V
IN
rises above V
OUT
, the loop keeps
the top MOSFET continuously on. The minimum on-time
for the LTC3787 is approximately 110ns.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the greatest improvement. Percent efficiency
can be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc., are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, five main sources usually account for most of
the losses in LTC3787 circuits: 1) IC VBIAS current, 2)
INTV
CC
regulator current, 3) I
2
R losses, 4) bottom MOS-
FET transition losses, 5) body diode conduction losses.
1. The VBIAS current is the DC supply current given in the
Electrical Characteristics table, which excludes MOSFET
driver and control currents. VBIAS current typically
results in a small (<0.1%) loss.
2. INTV
CC
current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge, dQ, moves
from INTV
CC
to ground. The resulting dQ/dt is a current
out of INTV
CC
that is typically much larger than the
control circuit current. In continuous mode, I
GATECHG
= f(Q
T
+ Q
B
), where Q
T
and Q
B
are the gate charges of
the topside and bottom side MOSFETs.
3. DC I
2
R losses. These arise from the resistances of the
MOSFETs, sensing resistor, inductor and PC board traces
and cause the efficiency to drop at high output currents.
4. Transition losses apply only to the bottom MOSFET(s),
and become significant only when operating at low
input voltages. Transition losses can be estimated from:
Transition Loss =(1.7)
V
3
OUT
V
IN
•
I
OUT(MAX)
2
•C
RSS
•f
5. Body diode conduction losses are more significant at
higher switching frequency. During the dead time, the loss
in the top MOSFETs is I
OUT
• V
DS
, where V
DS
is around
0.7V. At higher switching frequency, the dead time be-
comes a good percentage of switching cycle and causes
the efficiency to drop.
Other hidden losses, such as copper trace and internal
battery resistances, can account for an additional efficiency
degradation in portable systems. It is very important to
include these system-level losses during the design phase.
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LTC3787HGN#TRPBF

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Buy LTC3787HGN#TRPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators PolyPhSync Boost Cntr
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