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EL5174IS-T7

P1-P3P4-P6P7-P9P10-P12P13-P15
EL5174, EL5374
10
FN7313.9
August 12, 2015
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Simplified Schematic
Description of Operation and
Application Information
Product Description
The EL5174 and EL5374 are wide bandwidth, low power and
single/differential ended to differential output amplifiers. The
EL5174 is a single channel differential amplifier. Since the I
N
-
pin and REF pin are tied together internally, the EL5174 can be
used as a single-ended to differential converter. The EL5374 is
a triple channel differential amplifier. The EL5374 has a
separate I
N
- pin and REF pin for each channel. It can be used
as single/differential ended to differential converter. The
EL5174 and EL5374 are internally compensated for closed
loop gain of +1 of greater. Connected in a gain of 1 and driving
a 1k differential load, the EL5174 and EL5374 have a -3dB
bandwidth of 550MHz. Driving a 200 differential load at gain
of 2, the bandwidth is about 130MHz. The EL5374 is available
with a power-down feature to reduce the power while the
amplifier is disabled.
Input, Output and Supply Voltage Range
The EL5174 and EL5374 have been designed to operate with a
single supply voltage of 5V to 10V or split supplies with its total
voltage from 5V to 10V. The amplifiers have an input common
mode voltage range from -4.3V to 3.4V for ±5V supply. The
differential mode input range (DMIR) between the two inputs
is from -2.3V to +2.3V. The input voltage range at the REF pin is
from -3.3V to 3.7V. If the input common mode or differential
mode signal is outside the above-specified ranges, it will cause
the output signal to become distorted.
The output of the EL5174 and EL5374 can swing from -3.8V to
+3.8V at 1k differential load at ±5V supply. As the load
resistance becomes lower, the output swing is reduced.
Differential and Common Mode Gain
Settings
For EL5174, since the I
N
- pin and REF pin are bound together
as the REF pin in an 8 Ld package, the signal at the REF pin is
part of the common mode signal and also part of the
differential mode signal. For the true balance differential
outputs, the REF pin must be tied to the same bias level as the
I
N
+ pin. For a ±5V supply, just tie the REF pin to GND if the I
N
+
pin is biased at 0V with a 50 or 75 termination resistor. For
a single supply application, if the I
N
+ is biased to half of the
rail, the REF pin should be biased to half of the rail also.
The gain setting for EL5174 is expressed in Equation 1:
Where:
V
REF
= 0V
R
F1
= R
F2
= R
F
The EL5374 has a separate I
N
- pin and REF pin. It can be used
as a single/differential ended to differential converter. The
voltage applied at REF pin can set the output common mode
voltage and the gain is one.
The gain setting for EL5374 is expressed in Equation 2:
Where:
R
F1
= R
F2
= R
F
REF
R
10
R
9
R
CD
R
CD
OUT+
OUT-
C
C
R
6
R
5
C
C
R
4
R
3
R
7
R
8
R
2
R
1
V
B1
FBNFBPIN-IN+
V
B2
V
S
+
V
S
-
EL5174, EL5374
11
FN7313.9
August 12, 2015
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FIGURE 26.
Choice of Feedback Resistor and Gain
Bandwidth Product
For applications that require a gain of +1, no feedback resistor
is required. Just short the OUT+ pin to FBP pin and OUT- pin to
FBN pin. For gains greater than +1, the feedback resistor
forms a pole with the parasitic capacitance at the inverting
input. As this pole becomes smaller, the amplifier's phase
margin is reduced. This causes ringing in the time domain and
peaking in the frequency domain. Therefore, R
F
has some
maximum value that should not be exceeded for optimum
performance. If a large value of R
F
must be used, a small
capacitor in the few Pico farad range in parallel with R
F
can
help to reduce the ringing and peaking at the expense of
reducing the bandwidth.
The bandwidth of the EL5174 and EL5374 depends on the load
and the feedback network. R
F
and R
G
appear in parallel with
the load for gains other than +1. As this combination gets
smaller, the bandwidth falls off. Consequently, R
F
also has a
minimum value that should not be exceeded for optimum
bandwidth performance. For gain of +1, R
F
= 0 is optimum. For
the gains other than +1, optimum response is obtained with R
F
between 500 to 1k.
The EL5174 and EL5374 have a gain bandwidth product of
200MHz for R
LD
= 1k. For gains 5, its bandwidth can be
predicted by Equation 3:
Driving Capacitive Loads and Cables
The EL5174 and EL5374 can drive a 23pF differential
capacitor in parallel with 1k differential load with less than
5dB of peaking at gain of +1. If less peaking is desired in
applications, a small series resistor (usually between 5 to
50) can be placed in series with each output to eliminate
most peaking. However, this will reduce the gain slightly. If the
gain setting is greater than 1, the gain resistor R
G
can then be
chosen to make up for any gain loss, which may be created by
the additional series resistor at the output.
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, a back-termination series resistor at the
amplifier's output will isolate the amplifier from the cable and
allow extensive capacitive drive. However, other applications
may have high capacitive loads without a back-termination
resistor. Again, a small series resistor at the output can help to
reduce peaking.
Disable/Power-Down (for EL5374 only)
The EL5374 can be disabled and its outputs placed in a high
impedance state. The turn-off time is about 1.2µs and the
turn-on time is about 130ns. When disabled, the amplifier's
supply current is reduced to 1.7µA for I
S
+ and 120µA for I
S
-
typically, thereby effectively eliminating the power
consumption. The amplifier's power-down can be controlled by
standard CMOS signal levels at the EN pin. The applied logic
signal is relative to the V
S
+ pin. Letting the EN pin float or
applying a signal that is less than 1.5V below V
S
+ will enable
the amplifier. The amplifier will be disabled when the signal at
the EN
pin is above V
S
+ - 0.5V.
Output Drive Capability
The EL5174 and EL5374 have internal short circuit protection. Its
typical short circuit current is ±60mA. If the output is shorted
indefinitely, the power dissipation could easily increase such that
the part will be destroyed. Maximum reliability is maintained if
the output current never exceeds ±60mA. This limit is set by the
design of the internal metal interconnections.
Power Dissipation
With the high output drive capability of the EL5174 and EL5374,
it is possible to exceed the +135°C absolute maximum junction
temperature under certain load current conditions. Therefore, it
is important to calculate the maximum junction temperature for
the application to determine if the load conditions or package
types need to be modified for the amplifier to remain in the safe
operating area.
The maximum power dissipation allowed in a package is
determined according to Equation 4:
Where:
T
JMAX
= Maximum junction temperature
T
AMAX
= Maximum ambient temperature
JA
= Thermal resistance of the package
The maximum power dissipation actually produced by an IC is
the total quiescent supply current times the total power supply
voltage, plus the power in the IC due to the load, or as
expressed in Equation 5:
Where:
V
STOT
= Total supply voltage = V
S
+ - V
S
-
I
SMAX
= Maximum quiescent supply current per channel
V
O
= Maximum differential output voltage of the
application
R
LD
= Differential load resistance
EL5174, EL5374
12
FN7313.9
August 12, 2015
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I
LOAD
= Load current
i = Number of channels
By setting the two PD
MAX
equations equal to each other, we
can solve the output current and R
LD
to avoid the device
overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit board
layout is necessary for optimum performance. Lead lengths
should be as short as possible. The power supply pin must be well
bypassed to reduce the risk of oscillation. For normal single
supply operation, where the V
S
- pin is connected to the ground
plane, a single 4.7µF tantalum capacitor in parallel with a 0.1µF
ceramic capacitor from V
S
+ to GND will suffice. This same
capacitor combination should be placed at each supply pin to
ground if split supplies are to be used. In this case, the V
S
- pin
becomes the negative supply rail.
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire-wound resistors should be
avoided because of their additional series inductance. Use of
sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is very important. The
feedback resistor should be placed very close to the inverting
input pin. Strip line design techniques are recommended for
the signal traces.
Typical Applications
As the signal is transmitted through a cable, the high frequency
signal will be attenuated. One way to compensate this loss is to
boost the high frequency gain at the receiver side.
FIGURE 27. TWISTED PAIR CABLE RECEIVER
FIGURE 28. TRANSMIT EQUALIZER
FBP
R
G
R
F
IN+
IN-
REF
FBN
R
F
R
FR
R
GR
IN+
IN-
REF
EL5175/
EL5375
EL5174/
EL5374
V
O
50
50
R
T
TWISTED PAIR
Z
O
= 100
V
O
+
FBP
R
F
I
N
+
I
N
-
REF
FBN
R
F
V
O
-
R
G
R
T
R
GC
C
L
75
f
L
f
H
FREQUENCY
GAIN
(dB)
f
H
1
2R
GC
C
C
-----------------------------
f
L
1
2R
G
C
C
-------------------------
DC Gain 1
2R
F
R
G
-----------
+=
HFGain 1
2R
F
R
G
R
GC

--------------------------
+=
P1-P3P4-P6P7-P9P10-P12P13-P15

EL5174IS-T7

Mfr. #:
Buy EL5174IS-T7
Manufacturer:
Renesas / Intersil
Description:
IC OPAMP DIFF 1 CIRCUIT 8SOIC
Lifecycle:
New from this manufacturer.
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