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TSOP6237TT

P1-P3P4-P6P7-P9P10-P12
Not for New Design - Replaced by New TSOP62.., TSOP64.. (#82463)
TSOP62.., TSOP64..
www.vishay.com
Vishay Semiconductors
Rev. 2.4, 22-Mar-12
4
Document Number: 82177
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 9 - Max. Envelope Duty Cycle vs. Burst Length
Fig. 10 - Sensitivity vs. Ambient Temperature
Fig. 11 - Relative Spectral Sensitivity vs. Wavelength
Fig. 12 - Horizontal Directivity
Fig. 13 - Sensitivity vs. Supply Voltage
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0 20 40 60 80 100 120
Burst Length (number of cycles/burst)
Max. Envelope Duty Cycle
f = 38 kHz, E
e
= 2 mW/m²
TSOP62..
TSOP64..
21396_6
T
amb
- Ambient Temperature (°C)
E
e min.
- Threshold Irradiance (mW/m
2
)
21397
0.15
0.2
0.25
0.3
0.35
0.4
0.45
- 30 - 10 10 30 50 70 90
0.0
0.2
0.4
0.6
0.8
1.0
1.2
750 850 950 1050 1150
λ - Wavelength (nm)16919
S ( ) - Relative Spectral Sensitivityλ
rel
16801
0.4 0.2 0 0.2 0.4
0.6
0.6
0.9
0°
30°
10° 20°
40°
50°
60°
70°
80°
1.0
0.8
0.7
d
rel
- Relative Transmission Distance
0.20
0.25
0.30
0.35
0.40
0.45
0.50
1.5 2.5 3.5 4.5 5.5234 5
V
S
- Supply Voltage (V)
E
e min.
- Sensitivity (mW/m
2
)
21398
Not for New Design - Replaced by New TSOP62.., TSOP64.. (#82463)
TSOP62.., TSOP64..
www.vishay.com
Vishay Semiconductors
Rev. 2.4, 22-Mar-12
5
Document Number: 82177
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SUITABLE DATA FORMAT
The TSOP62.., TSOP64.. series are designed to suppress
spurious output pulses due to noise or disturbance signals.
Data and disturbance signals can be distinguished by the
devices according to carrier frequency, burst length and
envelope duty cycle. The data signal should be close to the
band-pass center frequency (e.g. 38 kHz) and fulfill the
conditions in the table below.
When a data signal is applied to the TSOP62.., TSOP64.. in
the presence of a disturbance signal, the sensitivity of the
receiver is reduced to insure that no spurious pulses are
present at the output. Some examples of disturbance
signals which are suppressed are:
• DC light (e.g. from tungsten bulb or sunlight)
• Continuous signals at any frequency
• Strongly or weakly modulated noise from fluorescent
lamps with electronic ballasts (see figure 14 or figure 15)
Fig. 14 - IR Signal from Fluorescent Lamp
with Low Modulation
Fig. 15 - IR Signal from Fluorescent Lamp
with High Modulation
Note
• For data formats with short bursts please see the datasheet of TSOP61.., TSOP63..
0101520
Time (ms)
16920
IR Signal
5
0101520
Time (ms)
16921
IR Signal
5
TSOP62.. TSOP64..
Minimum burst length 10 cycles/burst 10 cycles/burst
After each burst of length
a minimum gap time is required of
10 to 70 cycles
≥ 12 cycles
10 to 35 cycles
≥ 12 cycles
For bursts greater than
a minimum gap time in the data stream is needed of
70 cycles
> 4 x burst length
35 cycles
> 10 x burst length
Maximum number of continuous short bursts/second 800 1300
Recommended for NEC code yes yes
Recommended for RC5/RC6 code yes yes
Recommended for Sony code yes no
Recommended for Thomson 56 kHz code yes yes
Recommended for Mitsubishi code (38 kHz, preburst 8 ms, 16 bit) yes yes
Recommended for Sharp code yes yes
Suppression of interference from fluorescent lamps
Most common disturbance
signals are suppressed
Even extreme disturbance
signals are suppressed
Not for New Design - Replaced by New TSOP62.., TSOP64.. (#82463)
TSOP62.., TSOP64..
www.vishay.com
Vishay Semiconductors
Rev. 2.4, 22-Mar-12
6
Document Number: 82177
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
PACKAGE DIMENSIONS in millimeters
ASSEMBLY INSTRUCTIONS
Reflow Soldering
• Reflow soldering must be done within 72 h while stored
under a max. temperature of 30 °C, 60 % RH after
opening the dry pack envelope
• Set the furnace temperatures for pre-heating and heating
in accordance with the reflow temperature profile as
shown in the diagram. Excercise extreme care to keep the
maximum temperature below 260 °C. The temperature
shown in the profile means the temperature at the device
surface. Since there is a temperature difference between
the component and the circuit board, it should be verified
that the temperature of the device is accurately being
measured
• Handling after reflow should be done only after the work
surface has been cooled off
Manual Soldering
• Use a soldering iron of 25 W or less. Adjust the
temperature of the soldering iron below 300 °C
• Finish soldering within 3 s
• Handle products only after the temperature has cooled off
2.35
R 1.7
5.51
0.5 ± 0.15
3 x 1.27 = 3.81
2.6
7.5
7.2
4x
1.27
5.3
2.9
4
2.2
Pick and place area. TR taping
2.2
3 x 1.27 = 3.81
1.27
0.9
2.8
specifications
according to DIN
technical drawings
Not indicated tolerances ± 0.3
Pick and place area. TT taping
Footprint
(1.5)
(1.4)
Issue: 8; 02.09.09
16776
Drawing-No.: 6.544-5341.01-4
A
A
0.1
0.1
0.3
0.4
14
P1-P3P4-P6P7-P9P10-P12

TSOP6237TT

Mfr. #:
Buy TSOP6237TT
Manufacturer:
Vishay Semiconductors
Description:
Infrared Receivers RECOMMENDED ALT 782-TSOP6236TT
Lifecycle:
New from this manufacturer.
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