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BD00D0AWHFP-TR

P1-P3P4-P6P7-P9P10-P12
Technical Note
7/11
www.rohm.com
2011.03 - Rev.
A
© 2011 ROHM Co., Ltd. All rights reserved.
BD00D0AWHFP
0
2
4
6
8
10
0 25 50 75 100 125 150
Temperature atmosphere Ta(
℃
)
Power dissipation Pd
（
W)
1.6W
0
2
4
6
8
10
0 25 50 75 100 125 150
Temperature atmosphere Ta(
℃
)
Power dissipation Pd
（
W)
③
7.3W
②
5.5W
①
2.3W
●Thermal Design
Fig.15 Fig.16 (Reference data)
When using at temperatures over Ta=25℃, please refer to the heat reducing characteristics shown in Fig.15. and Fig.16.
The IC characteristics are closely related to the temperature at which the IC is used, so it is necessary to operate the IC
at temperatures less than the maximum junction temperature Tjmax.
Fig.15 and Fig.16 shows the acceptable loss and heat reducing characteristics of the HRP5 package. Even when the
ambient temperature Ta is a normal temperature (25℃), the chip (junction) temperature Tj may be quite high so please
operate the IC at temperatures less than the acceptable loss Pd.
The calculation method for power consumption Pc(W) is as follows :(Fig.16③)
Pc=(Vcc－Vo)×Io+Vcc×Ib
Acceptable loss Pd≧Pc
Solving this for load current Io in order to operate within the acceptable loss,
It is then possible to find the maximum load current Io
Max with respect to the applied voltage Vcc at the time of thermal
design.
Calculation Example)When Ta=85℃,Vcc=10V,Vo=5V
Please refer to the above information and keep thermal designs within the scope of acceptable loss for all operating
temperature ranges. The power consumption Pc of the IC when there is a short circuit (short between Vo and GND) is :
Pc=Vcc×(Ib+Ishort)
Fig.16③:θja=17.1℃/W → -58.4mW/℃
25℃=7.3W → 85℃=3.796W
Vcc:
Vo:
Io:
Ib:
Ishort:
Input voltage
Output voltage
Load current
Circuit current
Short current
(Please refer to Fig.9 for Ib.)
(Please refer to Fig. 5 for Ishort)
Mounted on a Rohm standard board
Board size : 70
㎜×70 ㎜×1.6 ㎜
θja=78.1(℃/W)
Mounted on a Rohm standard board
Board size : 70 ㎜×70 ㎜×1.6 ㎜
(board contains a thermal)
①2-layer board
(back surface copper foil area :15 ㎜×15 ㎜)
②2-layer board
(back surface copper foil area :70 ㎜×70 ㎜)
③4-layer board
(back surface copper foil area :70
㎜
×
70
㎜
)
①:θja=54.3℃/W
②:θja=22.7℃/W
③:θja=17.1℃/W
Io≦
Pd－Vcc×Ib
Vcc－Vo
Io≦758.2mA (Ib:0.5mA)
Io≦
3.796－10×Ib
5
Technical Note
8/11
www.rohm.com
2011.03 - Rev.
A
© 2011 ROHM Co., Ltd. All rights reserved.
BD00D0AWHFP
●Notes for use
1. Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings (such as the input voltage or operating temperature range) may
result in damage to the IC. Assumptions should not be made regarding the state of the IC (e.g., short mode or open mode)
when such damage is suffered. If operational values are expected to exceed the maximum ratings for the device, consider
adding protective circuitry (such as fuses) to eliminate the risk of damaging the IC.
2. Electrical characteristics described in these specifications may vary, depending on temperature, supply voltage, external
circuits and other conditions. Therefore, be sure to check all relevant factors, including transient characteristics.
3. GND potential
The potential of the GND pin must be the minimum potential in the system in all operating conditions.
Ensure that no pins are at a voltage below the GND at any time, regardless of transient characteristics.
4. Ground wiring pattern
When using both small-signal and large-current GND traces, the two ground traces should be routed separately but
connected to a single ground potential within the application in order to avoid variations in the small-signal ground caused
by large currents. Also ensure that the GND traces of external components do not cause variations on GND voltage.
The power supply and ground lines must be as short and thick as possible to reduce line impedance.
5. Inter-pin shorts and mounting errors
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC. Shorts between output pins or between output pins and the power supply or GND pins (caused by poor
soldering or foreign objects) may result in damage to the IC.
6. Operation in strong electromagnetic fields
Using this product in strong electromagnetic fields may cause IC malfunction. Caution should be exercised in applications
where strong electromagnetic fields may be present.
7. Testing on application boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance pin may subject the IC to
stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be
turned off completely before connecting or removing it from a jig or fixture during the evaluation process. To prevent
damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.
8. Thermal consideration
Use a thermal design that allows for a sufficient margin in light of the Pd in actual operating conditions.
Consider Pc that does not exceed Pd in actual operating conditions. (Pd≧Pc)
Tjmax : Maximum junction temperature=150[℃] , Ta : Peripheral temperature[℃] ,
θja : Thermal resistance of package-ambience[℃/W], Pd : Package Power dissipation [W],
Pc : Power dissipation [W], Vcc : Input Voltage, Vo : Output Voltage, Io : Load, Ib : Bias Current
Package Power dissipation : Pd (W)=(Tjmax－Ta)/θja
Power dissipation : Pc (W)=(Vcc－Vo)×Io+Vcc×Ib
9. Vcc pin
Insert a capacitor(Vo≧5V
:ca
pacitor≧1µF～, Vo＜5V:capacitor≧2.2µF～) between the Vcc and GND pins.
The appropriate capacitance value varies by application. Be sure to allow a sufficient margin for input voltage levels.
Electric capacitance
Ceramic capacitors, Low ESR capacitors
IC
Technical Note
9/11
www.rohm.com
2011.03 - Rev.
A
© 2011 ROHM Co., Ltd. All rights reserved.
BD00D0AWHFP
Cout_ESR vs Io(reference data) Cin vs Cout(reference data)
Vcc＝4V～25V Vo＝3V～15V
Ta
＝-40℃～+105℃
R1
＝5kΩ～10kΩ
Cin
＝2.2µF～100µF Cout＝2.2µF～100µF
0.001
0.01
0.1
1
10
100
0 400 800 1200 1600 2000
Io(mA)
Cou t_ESR (Ω）
Unstable operating region
Stable operating region
Vcc＝4V～25V Vo＝3V～15V
Ta
＝-40℃～+105℃ Io＝0A～2A
R1
＝5kΩ～10kΩ
1
10
100
1 10 100
Cout（μF）
Cin（μF）
Stable operating region
2.2
Unstable
operating region
10. Output pin
It is necessary to place capacitors between each output pin and GND to prevent oscillation on the output. Usable
capacitance values range from 2.2µF to 1000µF. Ceramic capacitors can be used as long as their ESR value is low
enough to prevent oscillation (0.001Ω to 20Ω). Abrupt fluctuations in input voltage and load conditions may affect the
output voltage.
11. CTL pin
Do not make voltage level of chip enable pin keep floating level, or in between VthH and VthL. Otherwise, the output
voltage would be unstable or indefinite.
12. For a steep change of the Vcc voltage
Because MOS FET for output Transistor is used when an input voltage change is very steep, it may evoke large current.
When selecting the value of external circuit constants, please make sure that the operation on the actual application takes
these conditions into account.
13. For an infinitesimal fluctuations of output voltage.
At the use of the application that infinitesimal fluctuations of output voltage caused by some factors (e.g. disturbance noise,
input voltage fluctuations, load fluctuations, etc.), please take enough measures to avoid some influence (e.g. insert the
filter, etc.).
14. Over current protection circuit (OCP)
The IC incorporates an integrated over-current protection circuit that operates in accordance with the rated output capacity.
This circuit serves to protect the IC from damage when the load becomes shorted. It is also designed to limit output current
(without latching) in the event of a large and instantaneous current flow from a large capacitor or other component. These
protection circuits are effective in preventing damage due to sudden and unexpected accidents. However, the IC should
not be used in applications characterized by the continuous or transitive operation of the protection circuits.
15. Thermal shutdown circuit (TSD)
The IC incorporates a built-in thermal shutdown circuit, which is designed to turn the IC off completely in the event of
thermal overload. It is not designed to protect the IC from damage or guarantee its operation. ICs should not be used after
this function has activated, or in applications where the operation of this circuit is assumed.
16. Applications or inspection processes where the potential of the Vcc pin or other pins may be reversed from their normal
state may cause damage to the IC's internal circuitry or elements. Use an output pin capacitance of 1000µF or lower in
case Vcc is shorted with the GND pin while the external capacitor is charged. Insert a diode in series with Vcc to prevent
reverse current flow, or insert bypass diodes between Vcc and each pin.
※Operatio
n N
otes 10 Measurement circuit
Cout(2.2µF～)
Vcc
Vo
CTL
GND
ADJ
R1
R2
Cin
VCTL
(5V)
(2.2µF～)
ESR
Io(ROUT)
(0.001Ω～)
(5k～10kΩ)
Vcc
(4～25V)
P1-P3P4-P6P7-P9P10-P12

BD00D0AWHFP-TR

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