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TSL1402R

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
TSL1402R
256 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS041G − NOVEMBER 2011
4
r
r
Copyright E 2011, TAOS Inc.
The LUMENOLOGY r Company
www.taosinc.com
Absolute Maximum Ratings
†
Supply voltage range, V
DD
−0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
−0.3 V to V
DD
+ 0.3V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0) or (V
I
> V
DD
) −20 mA to 20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
DD
) −25 mA to 25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high impedance or power-off state, V
O
−0.3 V to V
DD
+ 0.3 V. . .
Continuous output current, I
O
(V
O
= 0 to V
DD
) −25 mA to 25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
DD
or GND −40 mA to 40 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog output current range, I
O
−25 mA to 25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum light exposure at 638 nm 5 mJ/cm
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
−25°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
−25°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating Conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Recommended Operating Conditions (see Figure 1 and Figure 2)
MIN NOM MAX UNIT
Supply voltage, V
DD
3 5 5.5 V
Input voltage, V
I
0 V
DD
V
High-level input voltage, V
IH
2 V
DD
V
Low-level input voltage, V
IL
0 0.8 V
Wavelength of light source, λ 400 1000 nm
Clock frequency, f
clock
5 8000 kHz
Sensor integration time, Parallel, t
int
(see Note 1) 0.03375 100 ms
Sensor integration time, Serial, t
int
(see Note 1) 0.04975 100 ms
Setup time, serial input, t
su(SI)
20 ns
Hold time, serial input, t
h(SI)
(see Note 2) 0 ns
Operating free-air temperature, T
A
0 70 °C
NOTES: 1. Integration time is calculated as follows:
t
int(min)
= (256 − 18) y clock period + 20 ms
where 256 is the number of pixels in series, 18 is the required logic setup clocks, and 20 ms is the pixel charge transfer time (t
qt
)
2. SI must go low before the rising edge of the next clock pulse.
TSL1402R
256 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS041G − NOVEMBER 2011
5
The LUMENOLOGY r Company
r
r
Copyright E 2011, TAOS Inc.
www.taosinc.com
Electrical Characteristics at f
clock
= 1 MHz, V
DD
= 5 V, T
A
= 25°C, λ
p
= 640 nm, t
int
= 5 ms,
R
L
= 330 Ω, E
e
= 11 μW/cm
2
(unless otherwise noted) (see Note 3)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
out
Analog output voltage (white, average over 256 pixels) See Note 4 1.6 2 2.4 V
V
drk
Analog output voltage (dark, average over 256 pixels) E
e
= 0 0 0.1 0.2 V
PRNU Pixel response nonuniformity See Note 5 ± 10%
Nonlinearity of analog output voltage See Note 6 ± 0.4%
Output noise voltage See Note 7 1 mVrms
R
e
Responsivity See Note 8 25 35 45
V/
(μJ/cm
2
)
V
Analog output saturation voltage
V
DD
= 5 V, R
L
= 330 Ω 4.5 4.8
V
V
sat
Analog output saturation voltage
V
DD
= 3 V, R
L
= 330 Ω 2.5 2.8
V
SE
Saturation exposure
V
DD
= 5 V, See Note 9 136
nJ/cm
2
SE Saturation exposure
V
DD
= 3 V, See Note 9 78
nJ/cm
2
DSNU Dark signal nonuniformity All pixels, E
e
= 0, See Note 10 0.04 0.12 V
IL Image lag See Note 11 0.5%
I
Supply current
V
DD
= 5 V, E
e
= 0 6 9
mA
I
DD
Supply current
V
DD
= 3 V, E
e
= 0 5 8
mA
I
IH
High-level input current V
I
= V
DD
10 μA
I
IL
Low-level input current V
I
= 0 10 μA
C
i
Input capacitance, SI 5 pF
C
i
Input capacitance, CLK 10 pF
NOTES: 3. All measurements made with a 0.1 μF capacitor connected between V
DD
and ground.
4. The array is uniformly illuminated with a diffused LED source having a peak wavelength of 640 nm.
5. PRNU is the maximum difference between the voltage from any single pixel and the average output voltage from all pixels of the
device under test when the array is uniformly illuminated at the white irradiance level. PRNU includes DSNU.
6. Nonlinearity is defined as the maximum deviation from a best-fit straight line over the dark-to-white irradiance levels, as a percent
of analog output voltage (white).
7. RMS noise is the standard deviation of a single-pixel output under constant illumination as observed over a 5-second period.
8. R
e(min)
= [V
out(min)
− V
drk(max)
] ÷ (E
e
× t
int
)
9. SE(min) = [V
sat(min)
− V
drk(min)
] × 〈E
e
× t
int
) ÷ [V
out(max)
− V
drk(min)
]
10. DSNU is the difference between the maximum and minimum output voltage for all pixels in the absence of illumination.
11. Image lag is a residual signal left in a pixel from a previous exposure. It is defined as a percent of white-level signal remaining after
a pixel is exposed to a white condition followed by a dark condition:
IL +
V
out (IL)
* V
drk
V
out (white)
* V
drk
100
Timing Requirements (see Figure 1 and Figure 2)
MIN NOM MAX UNIT
t
su(SI)
Setup time, serial input (see Note 12) 20 ns
t
h(SI)
Hold time, serial input (see Note 12 and Note 13) 0 ns
t
w
Pulse duration, clock high or low 50 ns
t
r
, t
f
Input transition (rise and fall) time 0 500 ns
t
qt
Pixel charge transfer time 20 μs
NOTES: 12. Input pulses have the following characteristics: t
r
= 6 ns, t
f
= 6 ns.
13. SI must go low before the rising edge of the next clock pulse.
TSL1402R
256 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS041G − NOVEMBER 2011
6
r
r
Copyright E 2011, TAOS Inc.
The LUMENOLOGY r Company
www.taosinc.com
Dynamic Characteristics over recommended ranges of supply voltage and operating free-air
temperature (see Figures 7 and 8)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
s
Analog output settling time to ± 1% R
L
= 330 Ω, C
L
= 10 pF 120 ns
t
pd(SO)
Propagation delay time, SO1, SO2 50 ns
TYPICAL CHARACTERISTICS
18 Clock Cycles
257 Clock Cycles
CLK
SI
AO
Internal
Reset
Integration
Hi-ZHi-Z
Not Integrating Integrating
t
int
t
qt
Figure 1. Timing Waveforms (Serial Connection)
50%
AO
SI
CLK
Pixel 128 (256)
t
s
0 V
0 V
5 V
t
h(SI)
5 V
t
su(SI)
t
w
1 (129) 2 128 129 (257)
Pixel 1 (129)
t
pd(SO)
t
pd(SO)
SO
Figure 2. Operational Waveforms (each section)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

TSL1402R

Mfr. #:
Buy TSL1402R
Manufacturer:
ams
Description:
Light To Frequency & Light To Voltage Linear Sensor 400 DPI
Lifecycle:
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