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LD6815TD/30P,125

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
LD6815_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 14 December 2012 4 of 20
NXP Semiconductors
LD6815 series
Low dropout regulators, high PSRR, 150 mA
5. Limiting values
[1] The (absolute) maximum power dissipation depends on the junction temperature T
j
. Higher power
dissipation is allowed with lower ambient temperatures. The conditions to determine the specified values
are T
amb
=25C and the use of a two-layer Printed-Circuit Board (PCB).
[2] According to IEC 61340-3-1.
[3] According to JESD22-A115C.
6. Recommended operating conditions
[1] See Section 10.1 “Capacitor values”.
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
IN
voltage on pin IN 4 ms transient 0.5 +6.0 V
V
EN
voltage on pin EN 4 ms transient 0.5 +6.0 V
V
OUT
voltage on pin OUT 4 ms transient 0.5 +6.0 V
P
tot
total power dissipation
[1]
-800mW
T
stg
storage temperature 55 +150 C
T
j
junction temperature 40 +125 C
T
amb
ambient temperature 40 +85 C
V
ESD
electrostatic discharge
voltage
HBM level 6
[2]
- 6kV
machine model class 3
[3]
- 400 V
Table 6. Operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
T
amb
ambient temperature 40 - +85 C
T
j
junction temperature - - +125 C
Pin IN
V
IN
voltage on pin IN 2.3 - 5.5 V
Pin EN
V
EN
voltage on pin EN 0 - V
IN
V
Pin OUT
V
OUT
voltage on pin OUT 0.5 - V
IN
+ 0.3 V
C
L(ext)
external load capacitance
[1]
0.7 1.0 - F
LD6815_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 14 December 2012 5 of 20
NXP Semiconductors
LD6815 series
Low dropout regulators, high PSRR, 150 mA
7. Thermal characteristics
[1] The overall R
th(j-a)
can vary depending on the board layout. To minimize the effective R
th(j-a)
, all pins must
have a solid connection to larger Cu layer areas for example to the power and ground layer. In multilayer
PCB applications, the second layer is used to create a large heat spreader area directly below the LDO. If
this layer is either ground or power, it is connected with several vias to the top layer connecting to the
device ground or supply. Avoid the use of solder-stop varnish under the chip.
[2] Use the measurement data given for a rough estimation of the R
th(j-a)
in your application. The actual R
th(j-a)
value can vary in applications using different layer stacks and layouts.
8. Characteristics
Table 7. Thermal characteristics
Symbol Parameter Conditions Typ Unit
R
th(j-a)
thermal resistance from junction to ambient
[1][2]
125 K/W
Table 8. Electrical characteristics
At recommended input voltages and T
amb
=
40
C to +85
C; voltages are referenced to GND (ground = 0 V);
unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Output voltage
V
do
dropout voltage I
OUT
= 150 mA; V
IN
<V
O(nom)
- 250 - mV
V
O
output voltage variation V
OUT
<1.8V; I
OUT
=1mA
T
amb
=+25C 3 0.5 +3 %
40 C T
amb
+85 C 4- +4%
V
OUT
1.8 V; I
OUT
=1mA
T
amb
=+25C 2 0.5 +2 %
40 C T
amb
+85 C 3- +3%
Line regulation error
V
O
/(V
O
xV
I
) relative output voltage
variation with input voltage
V
IN
=(V
O(nom)
+ 0.5 V) to 5.5 V 0.1 - +0.1 %/V
Load regulation error
V
O
/(V
O
xI
O
) relative output voltage
variation with output current
1mA I
OUT
150 mA - 0.005 0.02 %/mA
Output current
I
OUT
current on pin OUT - - 150 mA
I
OM
peak output current V
IN
=(V
O(nom)
+ 0.5 V) to 5.5 V
V
O(nom)
1.8 V; V
OUT
=0.95 V
O(nom)
200 - - mA
V
O(nom)
<1.8V; V
OUT
=0.9 V
O(nom)
200 - - mA
I
sc
short-circuit current pin OUT - 300 - mA
Regulator quiescent current
I
q
quiescent current V
EN
=1.1V; I
OUT
=0mA - 35 - A
V
EN
=1.1V; I
OUT
=150mA;
V
IN
=V
O(nom)
+0.5V
- 150 - A
V
EN
0.4 V - 0.1 1 A
LD6815_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 14 December 2012 6 of 20
NXP Semiconductors
LD6815 series
Low dropout regulators, high PSRR, 150 mA
Ripple rejection and output noise
PSRR power supply rejection ratio V
IN
=V
O(nom)
+1.0V; I
OUT
=50mA;
f
ripple
= 1 kHz
-75-dB
V
n(o)(RMS)
RMS output noise voltage f
ripple
= 10 Hz to 100 kHz; C
L(ext)
=1F-40-V
Enable input and timing
V
IL
LOW-level input voltage pin EN 0 - 0.4 V
V
IH
HIGH-level input voltage pin EN 1.1 - 5.5 V
t
startup(reg)
regulator start-up time V
IN
= 5.5 V; V
OUT
=0.95 V
O(nom)
;
I
OUT
= 150 mA; C
L(ext)
=1F
- 150 - s
LD6815TD/xxP; auto discharge function
t
sd(reg)
regulator shutdown time V
IN
= 5.5 V; V
OUT
=0.05 V
O(nom)
;
C
L(ext)
=1F
- 300 - s
R
pd
pull-down resistance - 100 -
Table 8. Electrical characteristics
…continued
At recommended input voltages and T
amb
=
40
C to +85
C; voltages are referenced to GND (ground = 0 V);
unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

LD6815TD/30P,125

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Manufacturer:
NXP Semiconductors
Description:
IC REG LINEAR 3V 150MA 5TSOP
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