SG2524N

Rev 1.1a
Copyright 1994 11861 Western Avenue
Garden Grove, CA 92841
4 (714) 898-8121
FAX: (714) 893-2570
FIGURE 1 - OUTPUT STAGE DEADTIME VS. C
T
FIGURE 2 - OSCILLATOR FREQUENCY VS. R
T
AND C
T
APPLICATION NOTES
OSCILLATOR
The oscillator in the SG1524 uses an external resistor R
T
to
establish a constant charging current into an external capacitor
C
T
. While this uses more current than a series-connected RC, it
provides a linear ramp voltage at C
T
which is used as a time-
dependent reference for the PWM comparator. The charging
current is equal to 3.6V/R
T
, and should be restricted to between
30µA and 2mA. The equivalent range for R
T
is 1.8K to 100K.
The range of values for C
T
also has limits, as the discharge time
of C
T
determines the pulse width of the oscillator output pulse.
The pulse is used (among other things) as a blanking pulse to
both outputs to insure that there is no possibility of having both
outputs on simultaneously during transitions. This output
deadtime relationship is shown in Figure 1. A pulse width below
0.35 microseconds may cause failure of the internal flip-flop to
toggle. This restricts the minimum value of C
T
to 1000pF. (Note:
Although the oscillator output is a convenient oscilloscope sync
input, the probe capacitance will increase the pulse width and
decrease the oscillator frequency slightly.) Obviously, the upper
limit to the pulse width is determined by the modulation range
required in the power supply at the chosen switching frequency.
Practical values of C
T
fall between 1000pF and 0.1µF, although
successful 120 Hz oscillators have been implemented with val-
ues up to 5µF and a series surge limit resistor of 100 ohms.
The oscillator frequency is approximately 1/R
T
•C
T
; where R is in
ohms, C is in microfarads, and the frequency is in Megahertz. For
greater accuracy, the chart in Figure 2 may be used for a wide
range of operating frequencies.
Note that for buck regulator topologies, the two outputs can be
wire-ORed for an effective 0-90% duty cycle range. With this
connection, the output frequency is the same as the oscillator
frequency. For push-pull applications, the outputs are used
separately; the flip-flop limits the duty cycle range at each output
to 0-45%, and the effective switching frequency at the trans-
former is 1/2 the oscillator frequency.
If it is desired to synchronize the SG1524 to an external clock, a
positive pulse may be applied to the clock pin. The oscillator
should be programmed with R
T
and C
T
values that cause it to free-
run at 90% of the external sync frequency. A sync pulse with a
maximum logic 0 of +0.3 volts and a minimum logic 1 of +2.4 volts
applied to Pin 3 will lock the oscillator to the external source. The
minimum sync pulsewidth should be 200 nanoseconds, and the
maximum is determined by the required deadtime. The clock pin
should never be driven more negative than -0.3 volts, nor more
positive than +5.0 volts. The nominal resistance to ground is
3.2K at the clock pin, ±25% over temperature.
If two or more SG1524s must be synchronized together, program
one master unit with R
T
and C
T
for the desired frequency. Leave
the R
T
pins on the slaves open, connect the C
T
pins to the C
T
of
the master, and connect the clock pins to the clock pin of the
master. Since C
T
is a high-impedance node, this sync technique
works best when all devices are close together.
Rev 1.1a
Copyright 1994 11861 Western Avenue
Garden Grove, CA 92841
5 (714) 898-8121
FAX: (714) 893-2570
APPLICATION NOTES (continued)
CURRENT LIMITING
The current limiting circuitry of the SG1524 is shown in Figure 3.
By matching the base-emitter voltages of Q1 and Q2, and
assuming a negligible voltage drop across R1:
C.L. Threshold = V
BE
(Q1) + I
1
• R
2
- V
BE
(Q2) = I
1
• R
2
~ 200 mV
Although this circuit provides a relatively small threshold with a
negligible temperature coefficient, there are some limitations to
its use because of its simplicity.
The most important of these is the limited common-mode voltage
range: ±0.3 volts around ground. This requires sensing in the
ground or return line of the power supply. Also precautions
should be taken to not turn on the parasitic substrate diode of the
integrated circuit, even under transient conditions. A Schottky
clamp diode at Pin 5 may be required in some configurations to
achieve this.
A second factor to consider is that the response time is relatively
slow. The current limit amplifier is internally compensated by R
1
, C
1 ,
and Q1, resulting in a roll-off pole at approximately 300 Hz.
A third factor to consider is the bias current of the C.L. Sense
pins. A constant current of approximately 150µA flows out of Pin
4, and a variable current with a range of 0-150µA flows out of Pin
5. As a result, the equivalent source impedance seen by the
current sense pins should be less than 50 ohms to keep the
threshold error less than 5%.
Since the gain of this circuit is relatively low (42 dB), there is a
transition region as the current limit amplifier takes over pulse
width control from the error amplifier. For testing purposes,
threshold is defined as the input voltage required to get 25% duty
cycle (+2 volts at the error amplifier output) with the error amplifier
signaling maximum duty cycle.
APPLICATION NOTE: If the current limit function is not used on
the SG1524, the common-mode voltage range restriction re-
quires both current sense pins to be grounded.
FIGURE 3 - CURRENT LIMITING CIRCUITRY OF THE SG1524
In this conventional single-ended regulator circuit, the two out-
puts of the SG1524 are connected in parallel for effective 0 - 90%
duty-cycle modulation. The use of an output inductor requires
and R-C phase compensation network for loop stability.
Push-pull outputs are used in this transformer-coupled DC-DC
regulating converter. Note that the oscillator must be set at twice
the desired output frequency as the SG1524's internal flip-flop
divides the frequency by 2 as it switches the P.W.M. signal from
one output to the other. Current limiting is done here in the
primary so that the pulse width will be reduced should transformer
saturation occur.
Rev 1.1a
Copyright 1994 11861 Western Avenue
Garden Grove, CA 92841
6 (714) 898-8121
FAX: (714) 893-2570
Note 1. Contact factory for JAN and DESC product availablity.
2. All packages are viewed from the top.
CONNECTION DIAGRAMS & ORDERING INFORMATION (See Notes Below)
16-PIN CERAMIC DIP
J - PACKAGE
V
REF
+V
IN
E
B
C
B
C
A
E
A
SHUTDOWN
COMPENSATIONGROUND
OSC. OUTPUT
N.I. INPUT
Ambient
Temperature Range
SG1524J/883B -55°C to 125°C
JAN1524J -55°C to 125°C
SG1524J/DESC -55°C to 125°C
SG1524J -55°C to 125°C
SG2524J -25°C to 85°C
SG3524J 0°C to 70°C
Part No.Package
Connection Diagram
INV. INPUT
C
T
R
T
+C.L. SENSE
-C.L. SENSE
2
3
4
5
6
7
8
1
15
16
14
13
10
9
12
11
2
3
4
5
6
7
8
GROUND
OSC. OUTPUT
N.I. INPUT
INV. INPUT
C
T
R
T
+C.L. SENSE
-C.L. SENSE
1
15
16
14
13
10
12
11
9
V
REF
+V
IN
E
B
C
B
C
A
E
A
SHUTDOWN
COMPENSATION
SG2524N -25°C to 85°C
SG3524N 0°C to 70°C N Package: RoHS / Pb-free Transition DC: 0503*. 100% Matte Tin Lead Finish
16-PIN PLASTIC DIP
N - PACKAGE
16-PIN NARROW BODY
PLASTIC S.O.I.C.
D - PACKAGE
SG2524D -25°C to 85°C
SG3524D 0°C to 70°C
20-PIN CERAMIC
LEADLESS CHIP CARRIER
L- PACKAGE
4
5
6
7
8
321
9 11121310
14
15
16
17
18
20 19
SG1524L/883B -55°C to 125°C
SG1524L -55°C to 125°C
11. COMP
12. SHUTDOWN
13. N.C.
14. E
A
15. C
A
16. N.C.
17. C
B
18. E
B
19. N.C.
20. +V
IN
1. N.C.
2. V
REF
3. INV. INPUT
4. N.I. INPUT
5. OSC. OUTPUT
6. + C.L. SENSE
7. - C.L. SENSE
8. R
T
9. C
T
10. GROUND
RoHS /
Pb-free transition DC:0440 Pb-free / RoHS 100% Matte Tin Lead Finish*
*RoHS compliant

SG2524N

Mfr. #:
Manufacturer:
Texas Instruments
Description:
Switching Controllers PWM Ctlr
Lifecycle:
New from this manufacturer.
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