©2011 Silicon Storage Technology, Inc. DS25034A 09/11
21
4 Mbit (x16) Multi-Purpose Flash
SST39WF400B
Data Sheet
Microchip Technology Company
Figure 11:WE# Controlled Block-Erase Timing Diagram
Figure 12:WE# Controlled Sector-Erase Timing Diagram
1370 F09.0
ADDRESS A
MS-0
DQ
15-0
WE#
SW0 SW1 SW2 SW3 SW4 SW5
5555 2AAA 2AAA5555 5555
XX55 XX50XX55XXAA XX80 XXAA
BA
X
OE#
CE#
SIX-BYTE CODE FOR BLOCK-ERASE
T
BE
T
WP
Note: This device also supports CE# controlled Block-Erase operation The WE# and CE# signals are
interchangeable as long as minimum timings are met. (See Table 15)
A
MS
= Most significant address
A
MS
=A
17
for SST39WF400B
X can be V
IL
or V
IH,
but no other value.
1370 F10.0
ADDRESS A
MS-0
DQ
15-0
WE#
SW0 SW1 SW2 SW3 SW4 SW5
5555 2AAA 2AAA5555 5555
XX55 XX30XX55XXAA XX80 XXAA
SA
X
OE#
CE#
SIX-BYTE CODE FOR SECTOR-ERASE
T
SE
T
WP
Note: This device also supports CE# controlled Sector-Erase operation The WE# and CE# signals
are interchangeable as long as minimum timings are met. (See Table 15)
A
MS
= Most significant address
A
MS
=A
17
for SST39WF400B
X can be V
IL
or V
IH,
but no other value.
